公开(公告)号：US11817298B2

公开(公告)日：2023-11-14

申请号：US17108037

申请日：2020-12-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Incheol Song ,  Masayuki Tomoyasu ,  Hongmin Yoon ,  Jihyun Lim

IPC: H01J37/32

CPC classification number: H01J37/32642 ,  H01J37/32174 ,  H01J37/32715 ,  H01J2237/3341

Abstract: A focus ring includes a first conductive layer having a first thickness and a first specific resistance, a second conductive layer stacked on the first conductive layer, the second conductive layer having a second thickness greater than the first thickness and a second specific resistance greater than the first specific resistance, and a dielectric layer on one of a lower surface of the first conductive layer and an upper surface of the second conductive layer.

公开(公告)号：US11450545B2

公开(公告)日：2022-09-20

申请号：US16683707

申请日：2019-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwoo Sun ,  Incheol Song ,  Hongmin Yoon ,  Jihyun Lim ,  Masayuki Tomoyasu ,  Jewoo Han

IPC: H01L21/683 ,  H01J37/32

Abstract: According to some embodiments, a semiconductor substrate processing apparatus includes a housing, a plasma source unit, an electrostatic chuck, and a ring unit. The housing encloses a process chamber. The plasma source unit is connected to the housing, and includes a shower head and a fixing ring positioned to support the shower head. The shower head includes an upper electrode mounted on the fixing ring, and includes injection holes passing through part of the upper electrode and configured to inject gas into the chamber. The electrostatic chuck is connected to the housing and includes a lower electrode, and is for mounting a semiconductor substrate thereon. The ring unit is mounted on an edge portion of the electrostatic chuck, and includes a focus ring and a cover ring surrounding the focus ring. One of the lower electrode and the upper electrode is connected to a high frequency power supply, and the other of the lower electrode and the upper electrode is connected to ground. The focus ring has an inner side surface, and an opposite outer side surface that contacts the cover ring, and a width between the inner side surface and the outer side surface of the focus ring is a first width. The cover ring has an inner side surface that contacts the outer side surface of the focus ring, and an outer side surface, and a width between the inner side surface and the outer side surface of the cover ring is a second width. The first width is between 2 and 10 time the second width.

公开(公告)号：US09859175B2

公开(公告)日：2018-01-02

申请号：US15142275

申请日：2016-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiwook Song ,  Bum-Soo Kim ,  Kye Hyun Baek ,  Masayuki Tomoyasu ,  Eunwoo Lee ,  Jong Seo Hong

IPC: H01L21/66 ,  G01R31/26 ,  H01J37/32

CPC classification number: H01L22/10 ,  G05B19/41875 ,  G05B2219/32234 ,  G05B2219/45031 ,  H01J37/3288 ,  H01J37/32972

Abstract: Provided are substrate processing systems and methods of managing the same. The method may include displaying a notification for a preventive maintenance operation on a chamber, performing a maintenance operation on the chamber, performing a first optical test, and evaluating the preventive maintenance operation. The first optical test may include generating a reference plasma reaction, measuring a variation of intensity by wavelength for plasma light emitted from the reference plasma reaction, and calculating an electron density and an electron temperature from a ratio in intensity of the plasma light.

公开(公告)号：US11018046B2

公开(公告)日：2021-05-25

申请号：US16559762

申请日：2019-09-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong Woo Sun ,  Sung Moon Park ,  Je Woo Han ,  Kwang Nam Kim ,  Ho Chang Lee ,  Young Hoon Jeong ,  Masayuki Tomoyasu

IPC: H01L21/687 ,  H01L21/67 ,  H01J37/32

Abstract: A substrate processing apparatus including a process chamber; a susceptor in the process chamber; and an inner edge ring and an outer edge ring on the susceptor, wherein the inner edge ring includes a semiconductor, the outer edge ring includes an insulator, an upper surface of the outer edge ring is at a higher level than an upper surface of the inner edge ring, and the outer edge ring has an overhang extending onto the inner edge ring.

公开(公告)号：US09799561B2

公开(公告)日：2017-10-24

申请号：US15238836

申请日：2016-08-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan-Hoon Park ,  Dong-Chan Kim ,  Masayuki Tomoyasu ,  Je-Woo Han

IPC: H01L21/338 ,  H01L21/768 ,  H01L21/66 ,  H01L21/68 ,  H01L21/8234

CPC classification number: H01L21/76897 ,  H01L21/682 ,  H01L21/76805 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823475 ,  H01L22/12 ,  H01L22/20 ,  H01L29/4983

Abstract: A method for fabricating a semiconductor device is disclosed. The method includes forming a first interlayer insulating layer including a first trench that is defined by a first gate spacer and a second trench that is defined by a second gate spacer on a substrate, forming a first gate electrode that fills a part of the first trench and a second gate electrode that fills a part of the second trench, forming a first capping pattern that fills the remainder of the first trench on the first gate electrode, forming a second capping pattern that fills the remainder of the second trench on the second gate electrode, forming a second interlayer insulating layer that covers the first gate spacer and the second gate spacer on the first interlayer insulating layer, forming a third interlayer insulating layer on the second interlayer insulating layer and forming a contact hole that penetrates the third interlayer insulating layer and the second interlayer insulating layer between the first gate electrode and the second gate electrode.

公开(公告)号：US20170047200A1

公开(公告)日：2017-02-16

申请号：US15097365

申请日：2016-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyung-Joo Lee ,  Kye-hyun Baek ,  Masayuki Tomoyasu ,  Jong-seo Hong ,  Jin-pyoung Kim

IPC: H01J37/32

CPC classification number: H01J37/3244 ,  H01J37/32082 ,  H01J37/32532 ,  H01J37/32642 ,  H01J2237/334

Abstract: A plasma processing apparatus includes a chamber defining a process space, an upper electrode mounted in the chamber, the upper electrode including a first gas spray port located in a central region of the upper electrode and a second gas spray port located in a peripheral region of the upper electrode, a lower electrode located opposite the upper electrode across the process space, a first gas supply unit configured to supply a first process gas into the process space via the first gas spray port and the second gas spray port, a second gas supply unit configured to supply a second process gas into the process space via the second gas spray port, a sensor configured to sense a state of plasma in an edge portion of the process space, and a controller configured to control the second gas supply unit in response to an output signal of the sensor.

Abstract translation: 等离子体处理装置包括限定处理空间的室，安装在室中的上电极，上电极包括位于上电极的中心区域的第一气体喷射口和位于上电极的周边区域中的第二气体喷射口 所述上电极，位于与所述处理空间相对的上电极的下电极，配置成经由所述第一气体喷射口和所述第二气体喷射口将第一处理气体供给到所述处理空间中的第一气体供给单元， 被配置为经由第二气体喷射口将第二处理气体供应到处理空间的单元，配置成感测处理空间的边缘部分中的等离子体的状态的传感器，以及响应于控制第二气体供应单元的控制器 到传感器的输出信号。

公开(公告)号：US11837496B2

公开(公告)日：2023-12-05

申请号：US17324229

申请日：2021-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong Woo Sun ,  Sung Moon Park ,  Je Woo Han ,  Kwang Nam Kim ,  Ho Chang Lee ,  Young Hoon Jeong ,  Masayuki Tomoyasu

IPC: H01L21/687 ,  H01L21/67 ,  H01J37/32

CPC classification number: H01L21/68735 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/32642 ,  H01L21/67069 ,  H01L21/6875

Abstract: A substrate processing apparatus including a process chamber; a susceptor in the process chamber; and an inner edge ring and an outer edge ring on the susceptor, wherein the inner edge ring includes a semiconductor, the outer edge ring includes an insulator, an upper surface of the outer edge ring is at a higher level than an upper surface of the inner edge ring, and the outer edge ring has an overhang extending onto the inner edge ring.

公开(公告)号：US11791194B2

公开(公告)日：2023-10-17

申请号：US17324229

申请日：2021-05-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong Woo Sun ,  Sung Moon Park ,  Je Woo Han ,  Kwang Nam Kim ,  Ho Chang Lee ,  Young Hoon Jeong ,  Masayuki Tomoyasu

IPC: H01L21/687 ,  H01L21/67 ,  H01J37/32

CPC classification number: H01L21/68735 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/32642 ,  H01L21/67069 ,  H01L21/6875

Abstract: A substrate processing apparatus including a process chamber; a susceptor in the process chamber; and an inner edge ring and an outer edge ring on the susceptor, wherein the inner edge ring includes a semiconductor, the outer edge ring includes an insulator, an upper surface of the outer edge ring is at a higher level than an upper surface of the inner edge ring, and the outer edge ring has an overhang extending onto the inner edge ring.