公开(公告)号：US4789884A

公开(公告)日：1988-12-06

申请号：US851826

申请日：1986-04-14

申请人： Shigeaki Minamihata ,  Kazuyuki Kamegaki

发明人： Shigeaki Minamihata ,  Kazuyuki Kamegaki

IPC分类号： H01L27/02 ,  H01L29/417 ,  H01L29/423 ,  H01L29/72

CPC分类号： H01L29/42304 ,  H01L27/0233 ,  H01L29/417

摘要： A multi-stage IIL circuit is provided which includes common IIL elements each using a PNP transistor as an injector and an NPN transistor as an inverter, and inverse IIL elements each using an NPN transistor as an injector and a PNP transistor as an inverter.

摘要翻译： 提供了多级IIL电路，其包括各自使用PNP晶体管作为注入器的公共IIL元件和作为反相器的NPN晶体管，以及每个使用NPN晶体管作为注入器的反向IIL元件和作为反相器的PNP晶体管。

公开(公告)号：US06853063B2

公开(公告)日：2005-02-08

申请号：US10443039

申请日：2003-05-22

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L25/18 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L25/04 ,  H01L25/16 ,  H01L23/02 ,  H01L23/34 ,  H01L22/16 ,  H01L23/28 ,  H05K7/02

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.

摘要翻译： 引线接合或印刷电路板引线或引线框架或其等同物用于电连接形成在多个半导体芯片上的高耐压电容器的外部电极。 在半导体芯片上形成的用于信号传输的信号传输或接收电路的驱动电路与所述高耐压电容器的衬底侧电极电连接，导致多个半导体芯片被接收在单个封装或单个模块内 。 使用这种布置，半导体器件能够实现电介质和尺寸减小。

公开(公告)号：US20060267193A1

公开(公告)日：2006-11-30

申请号：US11495585

申请日：2006-07-31

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L23/34

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。

公开(公告)号：US4857987A

公开(公告)日：1989-08-15

申请号：US246924

申请日：1988-09-19

申请人： Setsuo Ogura ,  Kazuyuki Kamegaki ,  Kouichi Yamazaki ,  Hideo Miyazaki ,  Yukinori Kitamura ,  Shirou Mayuzumi

发明人： Setsuo Ogura ,  Kazuyuki Kamegaki ,  Kouichi Yamazaki ,  Hideo Miyazaki ,  Yukinori Kitamura ,  Shirou Mayuzumi

IPC分类号： H01L27/082 ,  H01L21/768 ,  H01L21/8226 ,  H01L23/522 ,  H01L27/02 ,  H01L29/41

CPC分类号： H01L27/0233

摘要： Herein disclosed is a semiconductor device including a plurality of IIL elements which are electrically connected by a plurality of first wirings arranged generally parallel with one another and a plurality of second wirings arranged generally parallel with one another and extended in different direction to the first wirings.

摘要翻译： 这里公开的是一种半导体器件，其包括多个IIL元件，它们通过彼此平行布置的多个第一布线电连接，并且多个第二布线大体上彼此平行地布置并沿与第一布线不同的方向延伸。

公开(公告)号：US07598605B2

公开(公告)日：2009-10-06

申请号：US11495585

申请日：2006-07-31

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L23/24 ,  H01L23/02 ,  H01L23/28 ,  H05K7/02

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。

公开(公告)号：US07091588B2

公开(公告)日：2006-08-15

申请号：US11024680

申请日：2004-12-30

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L23/02 ,  H01L23/34 ,  H01L23/28 ,  H01L22/16 ,  H05K7/02

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。

公开(公告)号：US06611051B2

公开(公告)日：2003-08-26

申请号：US09964813

申请日：2001-09-28

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L2302

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.

公开(公告)号：US20050112932A1

公开(公告)日：2005-05-26

申请号：US11024680

申请日：2004-12-30

申请人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

发明人： Noboru Akiyama ,  Minehiro Nemoto ,  Seigou Yukutake ,  Yasuyuki Kojima ,  Kazuyuki Kamegaki

IPC分类号： H01L25/18 ,  H01L23/31 ,  H01L23/48 ,  H01L23/495 ,  H01L25/04 ,  H01L25/16 ,  H01R4/24

CPC分类号： H01L23/3107 ,  H01L23/3121 ,  H01L23/48 ,  H01L23/49575 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/162 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/16265 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/484 ,  H01L2224/49175 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12036 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.

摘要翻译： 初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。 第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。 第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。 第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。 第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。 第一和第二基板和引线框由绝缘树脂密封。

公开(公告)号：US5300798A

公开(公告)日：1994-04-05

申请号：US978293

申请日：1992-11-17

申请人： Kouichi Yamazaki ,  Setsuo Ogura ,  Kazuyuki Kamegaki ,  Kenya Yamauchi ,  Yukinori Kitamura ,  Tuyoshi Nagase

发明人： Kouichi Yamazaki ,  Setsuo Ogura ,  Kazuyuki Kamegaki ,  Kenya Yamauchi ,  Yukinori Kitamura ,  Tuyoshi Nagase

IPC分类号： H01L21/3205 ,  H01L21/768 ,  H01L21/82 ,  H01L23/52 ,  H01L23/528 ,  H01L27/02

CPC分类号： H01L23/5286 ,  H01L27/0207 ,  H01L2924/0002 ,  H01L2924/3011

摘要： When a semiconductor integrated circuit device having a wiring structure of three or more layers is hierarchically considered as a collection of a plurality of functional blocks, each functional block is internally connected by wirings in the first wiring layer, in which wirings have their main extended direction prescribed to be the X-direction, and wirings in the second wiring layer, in which wirings have their main extended direction prescribed to be the Y-direction, formed over the first wiring layer. Wirings in the third wiring layer, in which wirings have their main extended direction prescribed to be the same as the wirings in the second wiring layer, formed over the second wiring layer, together with wirings in the first and second wiring layer, are used as signal wirings between functional blocks, while the wirings in the third wiring layer are used as power supply wirings for providing power supply to functional blocks. As the power supply paths to functional blocks, a plurality of power supply wirings are branched off from the power supply electrode such as a power supply pad and terminated there. The power supply electrode on the high voltage side and the power supply electrode on the low voltage side are disposed separately at opposing edge portions of the semiconductor substrate and the power supply wirings proceeding therefrom to their target functional blocks are bent in the vicinity of the edge portion of the semiconductor substrate and therefrom extended straight to the target points.

摘要翻译： 当具有三层以上的布线结构的半导体集成电路器件被分级地考虑为多个功能块的集合时，每个功能块通过布线在第一布线层中的布线内部连接，其中布线具有其主要延伸方向 规定为X方向，并且在第一布线层上形成第二布线层中的布线，其中布线的主要延伸方向规定为Y方向。 将在第二布线层中形成的与第二布线层中的配线相同的布线的第三布线层中的布线与第一布线层和第二布线层中的布线一起用作布线层的布线 功能块之间的信号布线，而第三布线层中的布线用作向功能块提供电源的电源布线。 作为对功能块的供电路径，多个电源配线从诸如电源焊盘的电源电极分支，并在那里终止。 高电压侧的电源电极和低电压侧的电源电极分别设置在半导体基板的相对的边缘部分，并且从其到达其目标功能块的电源布线在边缘附近弯曲 半导体衬底的一部分并且直接延伸到目标点。

公开(公告)号：US5132806A

公开(公告)日：1992-07-21

申请号：US538448

申请日：1990-06-15

申请人： Yukinori Kitamura ,  Setsuo Ogura ,  Shiro Mayuzumi ,  Shunji Mori ,  Toshiyuki Fukamachi ,  Yuji Kobayashi ,  Kouichi Yamazaki ,  Makoto Furihata ,  Kazuyuki Kamegaki

发明人： Yukinori Kitamura ,  Setsuo Ogura ,  Shiro Mayuzumi ,  Shunji Mori ,  Toshiyuki Fukamachi ,  Yuji Kobayashi ,  Kouichi Yamazaki ,  Makoto Furihata ,  Kazuyuki Kamegaki

IPC分类号： H01L21/761 ,  H01L21/822 ,  H01L21/8222 ,  H01L21/8226 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/082 ,  H04N9/79

CPC分类号： H04N9/79 ,  H01L27/0207 ,  H01L2224/05554 ,  H01L2224/45147 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/1301 ,  H01L2924/1305 ,  Y10S257/906

摘要： Disclosed is a novel semiconductor integrated circuit device for use in a color VTR (Video Tape Recorder). Concretely, the semiconductor integrated circuit device comprises a substantially rectangular semiconductor chip which has a principal surface, a luminance signal processing unit and a color signal processing unit which are disposed at the positions of the principal surface opposing to each other, and a semiconductor region which is provided in the interspace of the principal surface between the luminance signal and color signal processing units opposing to each other and which is supplied with a bias stable A.C.-wise. Further, the semiconductor region is located substantially at the central portion of the semiconductor chip and is extended so as to intersect with one set of opposing sides of the rectangular semiconductor chip.

摘要翻译： 公开了一种用于彩色VTR（录像机）的新型半导体集成电路装置。 具体地，半导体集成电路器件包括：主体表面的基本上矩形的半导体芯片，设置在彼此相对的主表面的位置处的亮度信号处理单元和颜色信号处理单元;以及半导体区域， 设置在彼此相对的亮度信号和颜色信号处理单元之间的主表面的间隙中，并且被提供有偏置稳定的交流方式。 此外，半导体区域基本上位于半导体芯片的中心部分并且被延伸以与矩形半导体芯片的一组相对侧相交。