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1.发明公开公开(公告)号：US20240194822A1
公开(公告)日：2024-06-13
申请号：US18577358
申请日：2022-07-13
Applicant: The Regents of the University of California
Inventor： Srinivas Gandrothula , Shuji Nakamura , Steven P. DenBaars
CPC classification number: H01L33/007 , H01L25/50 , H01L33/0093 , H01L33/0095
Abstract: A method for fabricating small size light emitting diodes (LEDs) on high-quality epitaxial crystal layers. III-nitride epitaxial lateral overgrowth (ELO) layers are grown on a substrate using a growth restrict mask. III-nitride device layers are grown on wings of the III-nitride ELO layers, to form island-like III-nitride semiconductor layers. The wings of the III-nitride ELO layers have at least an order of magnitude smaller defect density than the substrate, resulting in superior characteristics for the devices made thereon. Light emitting mesas are etched from the island-like III-nitride semiconductor layers, wherein each of the light emitting mesas corresponds to a device; and a device unit pattern is etched from the island-like III-nitride semiconductor layers, wherein the device unit pattern is comprised of one or more of the light emitting mesas. The device unit pattern including the island-like III-nitride semiconductor layers is then transferred to display panel or a carrier.
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公开(公告)号：US11735419B2
公开(公告)日：2023-08-22
申请号：US16752428
申请日：2020-01-24
Applicant: The Regents of the University of California
Inventor： Christian J. Zollner , Michael Iza , James S. Speck , Shuji Nakamura , Steven P. DenBaars
IPC: H01L21/02 , H01L29/20 , H01L29/201
CPC classification number: H01L21/02664 , H01L21/0254 , H01L21/02617 , H01L29/201 , H01L29/2003
Abstract: A method for protecting a semiconductor film comprised of one or more layers during processing. The method includes placing a surface of the semiconductor film in direct contact with a surface of a protective covering, such as a separate substrate piece, that forms an airtight or hermetic seal with the surface of the semiconductor film, so as to reduce material degradation and evaporation in the semiconductor film. The method includes processing the semiconductor film under some conditions, such as a thermal annealing and/or controlled ambient, which might cause the semiconductor film's evaporation or degradation without the protective covering.
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公开(公告)号：US11348908B2
公开(公告)日：2022-05-31
申请号：US16325709
申请日：2017-08-17
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Benjamin P. Yonkee , Erin C. Young , James S. Speck , Steven P. DenBaars , Shuji Nakamura
Abstract: A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.
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4.发明申请公开(公告)号：US20220029049A1
公开(公告)日：2022-01-27
申请号：US17496124
申请日：2021-10-07
Applicant: The Regents of the University of California , King Abdulaziz City For Science And Technology (KACST)
Inventor： Abdullah Ibrahim Alhassan , Ahmed Alyamani , Abdulrahman Albadri , James S. Speck , Steven P. DenBaars
Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.
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5.发明授权公开(公告)号：US11158760B2
公开(公告)日：2021-10-26
申请号：US16270177
申请日：2019-02-07
Applicant: The Regents of the University of California
Inventor： Abdullah Ibrahim Alhassan , James S. Speck , Steven P. DenBaars , Ahmed Alyamani , Abdulrahman Albadri
Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20200335663A1
公开(公告)日：2020-10-22
申请号：US16075949
申请日：2017-02-06
Applicant: The Regents of the University of California
Inventor： Asad J. Mughal , Stacy J. Kowsz , Robert M. Farrell , Benjamin P. Yonkee , Erin C. Young , Christopher D. Pynn , Tal Margalith , James S. Speck , Shuji Nakamura , Steven P. DenBaars
Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.
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公开(公告)号：US10529892B2
公开(公告)日：2020-01-07
申请号：US15698181
申请日：2017-09-07
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Robert M. Farrell, Jr. , Troy J. Baker , Arpan Chakraborty , Benjamin A. Haskell , P. Morgan Pattison , Rajat Sharma , Umesh K. Mishra , Steven P. DenBaars , James S. Speck , Shuji Nakamura
IPC: H01L33/16 , H01L33/00 , B82Y20/00 , C30B23/02 , C30B25/18 , C30B29/40 , H01L21/02 , H01S5/32 , H01S5/343 , H01L33/02 , H01S5/042 , H01S5/22
Abstract: A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.
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公开(公告)号：US20190273194A1
公开(公告)日：2019-09-05
申请号：US16238736
申请日：2019-01-03
Applicant: The Regents of the University of California
Inventor： Shuji Nakamura , Steven P. DenBaars , Hirokuni Asamizu
Abstract: A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.
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9.发明申请公开(公告)号：US20190245112A1
公开(公告)日：2019-08-08
申请号：US16270177
申请日：2019-02-07
Applicant: The Regents of the University of California
Inventor： Abdullah Ibrahim Alhassan , James S. Speck , Steven P. DenBaars
CPC classification number: H01L33/0075 , C23C16/18 , H01L33/06 , H01L33/325
Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.
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10.发明申请公开(公告)号：US20190165213A1
公开(公告)日：2019-05-30
申请号：US16320924
申请日：2017-08-17
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Benjamin P. Yonkee , Erin C. Young , James S. Speck , Steven P. DenBaars , Shuji Nakamura
Abstract: A III-Nitride LED which utilizes n-type III-Nitride layers for current spreading on both sides of the device. A multilayer dielectric coating is used underneath the wire bond pads, both LED contacts are deposited in one step, and the p-side wire bond pad is moved off of the mesa. The LED has a wall plug efficiency or External Quantum Efficiency (EQE) over 70%, a fractional EQE droop of less than 7% at 20 A/cm2 drive current and less than 15% at 35 A/cm2 drive current. The LEDs can be patterned into an LED array and each LED can have an edge dimension of between 5 and 50 μm. The LED emission wavelength can be below 400 nm and aluminum can be added to the n-type III-Nitride layers such that the bandgap of the n-type III-nitride layers is larger than the LED emission photon energy.
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