公开(公告)号：US20250112629A1

公开(公告)日：2025-04-03

申请号：US18374202

申请日：2023-09-28

Applicant: Texas Instruments Incorporated

Inventor： Eung Jung Kim ,  Xiaochun Zhao ,  Abidur Rahman ,  Sualp Aras

IPC: H03K17/0812

Abstract: An example apparatus includes: a first transistor having a first terminal, a second terminal, and a control terminal; a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first terminal of the first transistor, the second terminal of the second transistor coupled to the second terminal of the first transistor; first driver circuitry having a terminal coupled to the control terminal of the first transistor; second driver circuitry having a terminal coupled to the control terminal of the second transistor; and gate balancing circuitry having a first terminal and a second terminal, the first terminal of the gate balancing circuitry coupled to the control terminal of the first transistor and the terminal of the first driver circuitry, the second terminal of the gate balancing circuitry coupled to the control terminal of the second transistor.

公开(公告)号：US11574902B2

公开(公告)日：2023-02-07

申请号：US16264065

申请日：2019-01-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung Kim ,  Kyle Clifton Schulmeyer ,  Sualp Aras ,  Md Abidur Rahman ,  Xiaochun Zhao

IPC: G05F1/565 ,  H01L27/02 ,  H02H9/04

Abstract: A system includes a clamp network coupled between an input and an output and configured to clamp a voltage between the input and the output to a first clamp voltage based on the presence of a trigger signal and to a second clamp voltage based on the absence of the trigger signal. The second clamp voltage is greater than the first clamp voltage and the first clamp voltage is less than a breakdown voltage of the power transistor device. A detector circuit is coupled to the input and the output. A power transistor device may also be coupled between the input and the output. The detector circuit is configured to detect a pulse signal at the input or the output while the power transistor device is off and to generate the trigger signal for a time interval based on detecting the pulse signal.

公开(公告)号：US20250105839A1

公开(公告)日：2025-03-27

申请号：US18474314

申请日：2023-09-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiaochun Zhao

IPC: H03K17/687 ,  G01R19/00 ,  H03K19/20

Abstract: An apparatus includes a circuit including a circuit input, a circuit output, and a circuit terminal. A current mirror has a mirror input and a mirror output. The mirror input is coupled to the circuit terminal. A logic gate has a logic gate input coupled to the mirror output. A resistor is coupled between the mirror output and a supply reference terminal. A transistor has a control input and a current terminal. The control input is coupled to the circuit input. The current terminal is coupled to the circuit output.

公开(公告)号：US20130176155A1

公开(公告)日：2013-07-11

申请号：US13782902

申请日：2013-03-01

Applicant: Texas Instruments Incorporated

Inventor： Sualp Aras ,  Guhaprakash Amudhan ,  Abidur Rahman ,  Xiaochun Zhao

IPC: H03M1/08

CPC classification number: H03M1/00 ,  G11C27/026 ,  H02M3/07 ,  H03L7/18 ,  H03M1/0818 ,  H03M1/12 ,  H04N3/155 ,  H04N5/335 ,  H04N5/3577

Abstract: An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.

Abstract translation: 一种装置，包括：电荷泵; 采样器采样光信号，包括：黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟，其耦合到并提供时钟信号以便：a）耦合到电荷泵的电荷泵逻辑; 以及b）耦合到采样器的采样器逻辑，其对光信号进行采样，其中如果电荷泵的时钟运行比模拟前端（“AFE”）视频采样时钟快，则配置状态机控制 到：在视频采样信号下降沿之前跳过电荷泵时钟周期，从而恢复下一个电荷泵时钟周期的正常操作，其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。

公开(公告)号：US20240259010A1

公开(公告)日：2024-08-01

申请号：US18455656

申请日：2023-08-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiaochun Zhao ,  Abidur Rahman ,  Eung Jung Kim ,  Tianhong Yang ,  Huijuan Li

IPC: H03K17/0812

CPC classification number: H03K17/0812

Abstract: A transistor is coupled between a first voltage input and a voltage output in a first current path. First circuitry is coupled to a second voltage input, a control terminal of the transistor, and the voltage output. Second circuitry is coupled between the control terminal and ground in a second current path and between the control terminal and ground in a third current path parallel to the second current path. The second current path includes the control terminal, first and second terminals of the second circuitry, and ground. The third current path includes the control terminal, a second and the third terminal of the second circuitry, and ground. Third circuitry is coupled between the control terminal and the voltage output in a fourth current path. The fourth current path includes the control terminal, first and second terminals of the third circuitry, and the voltage output.

公开(公告)号：US08730075B2

公开(公告)日：2014-05-20

申请号：US13782902

申请日：2013-03-01

Applicant: Texas Instruments Incorporated

Inventor： Sualp Aras ,  Guhaprakash Amudhan ,  Abidur Rahman ,  Xiaochun Zhao

IPC: H03M1/00 ,  H03M1/12 ,  H04N5/335 ,  H04N3/14 ,  G11C27/02 ,  H02M3/07 ,  H03L7/18

CPC classification number: H03M1/00 ,  G11C27/026 ,  H02M3/07 ,  H03L7/18 ,  H03M1/0818 ,  H03M1/12 ,  H04N3/155 ,  H04N5/335 ,  H04N5/3577

Abstract: An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.

Abstract translation: 一种装置，包括：电荷泵; 采样器采样光信号，包括：黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟，其耦合到并提供时钟信号以便：a）耦合到电荷泵的电荷泵逻辑; 以及b）耦合到采样器的采样器逻辑，其对光信号进行采样，其中如果电荷泵的时钟运行比模拟前端（“AFE”）视频采样时钟快，则配置状态机控制 到：在视频采样信号下降沿之前跳过电荷泵时钟周期，从而恢复下一个电荷泵时钟周期的正常操作，其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。

公开(公告)号：US20250048721A1

公开(公告)日：2025-02-06

申请号：US18228385

申请日：2023-07-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung Kim ,  Thomas Grebs ,  Sunglyong Kim ,  Sungho Beck ,  Wei Fu ,  Xiaochun Zhao ,  Arjun Pankaj

IPC: H01L29/78 ,  H01L27/06 ,  H01L27/092 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/786

Abstract: Described examples include an integrated circuit having first and second transistors. The first transistor includes a plurality of trenches extending into a semiconductor substrate and a plurality of source regions, each source region located between a pair of adjacent trenches. A first source terminal is connected to the plurality of source regions. The second transistor includes a central source region between a pair of the trenches and a second source terminal connected to the central source region. The second source terminal is conductively isolated from the first source terminal.

公开(公告)号：US10821922B2

公开(公告)日：2020-11-03

申请号：US15212535

申请日：2016-07-18

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： George Konnail ,  Angelo Pereira ,  Hasibur Rahman ,  Xiaochun Zhao ,  Artur Juliusz Lewinski

IPC: G06F1/32 ,  B60R16/03 ,  G06F1/3203 ,  G06F1/3287

Abstract: One example includes a power control system. The power control system includes an activation controller that is powered via a first power voltage generated via a first power supply and is configured to provide an enable signal. The activation controller can assert the enable signal in response to an input activation signal to control activation of a second power supply. The second power supply can generate a second power voltage in response to the enable signal being asserted. The second power voltage can be provided to regulate power associated with ancillary electronic circuitry. The system also includes a deactivation controller that is powered via the second power voltage and is configured to generate a disable signal to de-assert the enable signal in response to one of a plurality of predetermined deactivation conditions.

公开(公告)号：US09743188B2

公开(公告)日：2017-08-22

申请号：US14925416

申请日：2015-10-28

Applicant: Texas Instruments Incorporated

Inventor： Xiaochun Zhao ,  Jim Kien Huy Le

IPC: H04R29/00 ,  H04R5/04 ,  H01R24/58 ,  H01R107/00

CPC classification number: H04R5/04 ,  H01R24/58 ,  H01R2107/00 ,  H04R2420/09

Abstract: Systems and methods for audio plug type detection excursion are described. In some embodiments, a method may include: receiving an audio plug at an audio jack; grounding a sleeve terminal of the audio jack; applying an electrical current to a second ring terminal of the audio jack; and measuring a voltage between the second ring terminal and the sleeve terminal. In other embodiments an electronic circuit may include a controller and a memory coupled to the controller, the memory having program instructions stored thereon that, upon execution by the controller, cause the controller to: ground a sleeve terminal of an audio jack; apply an electrical current to a second ring terminal of the audio jack; and measure a voltage between the second ring terminal and the sleeve terminal.

公开(公告)号：US20160269842A1

公开(公告)日：2016-09-15

申请号：US14925416

申请日：2015-10-28

Applicant: Texas Instruments Incorporated

Inventor： Xiaochun Zhao ,  Jim Kien Huy Le

IPC: H04R29/00 ,  H04R5/04 ,  H01R24/58

CPC classification number: H04R5/04 ,  H01R24/58 ,  H01R2107/00 ,  H04R2420/09

Abstract: Systems and methods for audio plug type detection excursion are described. In some embodiments, a method may include: receiving an audio plug at an audio jack; grounding a sleeve terminal of the audio jack; applying an electrical current to a second ring terminal of the audio jack; and measuring a voltage between the second ring terminal and the sleeve terminal. In other embodiments an electronic circuit may include a controller and a memory coupled to the controller, the memory having program instructions stored thereon that, upon execution by the controller, cause the controller to: ground a sleeve terminal of an audio jack; apply an electrical current to a second ring terminal of the audio jack; and measure a voltage between the second ring terminal and the sleeve terminal.

Abstract translation: 描述音频插头型检测偏移的系统和方法。 在一些实施例中，一种方法可以包括：在音频插孔处接收音频插头; 接地音频插孔的套筒端子; 将电流施加到音频插孔的第二环形端子; 并测量第二环形端子和套筒端子之间的电压。 在其他实施例中，电子电路可以包括控制器和耦合到控制器的存储器，存储器具有存储在其上的程序指令，其在由控制器执行时使控制器：将音频插孔的套筒端子接地; 将电流施加到音频插孔的第二环形端子; 并测量第二环形端子和套筒端子之间的电压。