Field controlled thyristor with dual resistivity field layer
    1.
    发明授权
    Field controlled thyristor with dual resistivity field layer 失效
    具有双电阻率场层的场控晶闸管

    公开(公告)号:US4223328A

    公开(公告)日:1980-09-16

    申请号:US911311

    申请日:1978-06-01

    摘要: A field controlled thyristor is disclosed which comprises a first emitter region exposed to one main surface of a semiconductor substrate and having a first conductivity type, a second emitter region exposed to the other main surface of the substrate and having a second conductivity type, a base region connecting the first and the second emitter region, and a gate region provided in the base region. The gate region consists of a slab-like first portion disposed parallel to both the emitter and a second portion connecting the first slab-like portion with one of the main surfaces of the semiconductor substrate. The impurity concentration of the base region is higher in the portion of the base region nearer to the emitter region having the same conductivity type as that of the base region than in the portion of the base region nearer to the emitter region having the opposite conductivity type to that of the base region. The field controlled thyristor has a high forward blocking voltage gain (anode-cathode voltage/gate bias voltage), a large current rating, and a high switching power capability and its switching time is very short.

    摘要翻译: 公开了一种场控晶闸管,其包括暴露于半导体衬底的一个主表面并具有第一导电类型的第一发射极区域,暴露于衬底的另一个主表面并具有第二导电类型的第二发射极区域, 连接第一和第二发射极区域的区域,以及设置在基极区域中的栅极区域。 栅极区域由平行于发射极的板状第一部分和将第一板状部分与半导体衬底的主表面中的一个连接的第二部分组成。 基极区域的杂质浓度比基极区域具有与基极区域相同的导电类型的发射极区域的部分比在具有相反导电类型的发射极区域更靠近的部分的基极区域更高 到基地区。 场控晶闸管具有高正向阻断电压增益(阳极 - 阴极电压/栅极偏置电压),大额定电流和高开关功率能力,其开关时间非常短。

    Field controlled thyristor with double-diffused source region
    3.
    发明授权
    Field controlled thyristor with double-diffused source region 失效
    具有双扩散源极区域的场控晶闸管

    公开(公告)号:US4514747A

    公开(公告)日:1985-04-30

    申请号:US357594

    申请日:1982-03-12

    摘要: Disclosed is a field controlled thyristor in which a first semiconductor region of N.sup.+ -type, a second semiconductor region of N-type, third semiconductor regions of P-type, a fourth semiconductor region of N.sup.- -type and a fifth semiconductor region of P.sup.+ -type are formed in a semiconductor substrate having two main surfaces, the first, second and third semiconductor regions being exposed in the first main surface and the fifth semiconductor region being exposed in the second main surface; and the third semiconductor regions of P-type are spaced from each other by a predetermined spacing. The third semiconductor regions are connected with surface-exposed semiconductor regions exposed in the first main surface. The impurity concentration in the second semiconductor region decreases from the first semiconductor region toward the third semiconductor region so that a low forward voltage drop can be achieved along with a high reverse blocking voltage. Also disclosed is a method for forming the third semiconductor regions and the surface-exposed semiconductor regions through a diffusion process alone.

    摘要翻译: 公开了一种场控晶闸管,其中N +型的第一半导体区域,N型的第二半导体区域,P型的第三半导体区域,N型的第四半导体区域和P + 型形成在具有两个主表面的半导体衬底中,第一,第二和第三半导体区域暴露在第一主表面中,第五半导体区域暴露在第二主表面中; 并且P型的第三半导体区域彼此隔开预定间隔。 第三半导体区域与暴露在第一主表面中的暴露表面的半导体区域连接。 第二半导体区域中的杂质浓度从第一半导体区域朝向第三半导体区域减小,从而可以实现高反向阻断电压的低正向压降。 还公开了通过单独的扩散处理形成第三半导体区域和表面暴露的半导体区域的方法。

    Bidirectional photothyristor device
    5.
    发明授权
    Bidirectional photothyristor device 失效
    双向光闸晶体管

    公开(公告)号:US4016593A

    公开(公告)日:1977-04-05

    申请号:US583406

    申请日:1975-06-03

    CPC分类号: H01L31/0203 H01L31/1113

    摘要: A bidirectional photothyristor device comprises a semiconductive substrate including an NPNPN quintuple layer in which projections of both the outer layers Ns in the stacking direction are not overlapped so as to define two quadruple layer regions each having either one of the outer layers Ns as an end layer, a pair of main electrodes connecting the two quadruple layer regions in parallel relationship, a recess formed between the two quadruple layer regions within the semiconductive substrate and to which two intermediate P-N junctions are exposed, and means for applying a light trigger signal to the recess.

    摘要翻译: 双向光闸晶体管装置包括一个包括NPNPN五元组的半导体衬底,其中层叠方向上的两个外层Ns的突起不重叠,以便限定两个四层层,每层具有外层Ns中的任一层作为端层 一对主电极并联连接两个四重层区域,形成在半导体衬底内的两个四重层区域之间并且两个中间PN结露出的凹部和用于将光触发信号施加到凹部的装置 。

    Semiconductor photodetector
    6.
    发明授权
    Semiconductor photodetector 失效
    半导体光电探测器

    公开(公告)号:US4079405A

    公开(公告)日:1978-03-14

    申请号:US589675

    申请日:1975-06-24

    IPC分类号: H01L31/00 H01L31/06 H01L29/48

    CPC分类号: H01L31/00 H01L31/06 Y02E10/50

    摘要: A semiconductor photodetector comprising a first semiconductor layer having N-type conductivity; a second semiconductor layer having N-type conductivity, disposed in the vicinity of the first semiconductor layer and having a resistivity higher than that of the first semiconductor layer; a third region having P-type conductivity, disposed in the vicinity of the second semiconductor layer and having a thickness smaller than that of the second semiconductor layer; a first main electrode kept in ohmic contact with the first semiconductor layer; and a second main electrode kept in ohmic contact with a portion of the third region, the surface of the third region serving as a light receiving surface.

    摘要翻译: 一种半导体光电检测器,包括具有N型导电性的第一半导体层; 具有N型导电性的第二半导体层,设置在所述第一半导体层附近并具有比所述第一半导体层的电阻率高的电阻率; 具有P型导电性的第三区域,设置在所述第二半导体层附近,并且具有比所述第二半导体层的厚度小的厚度; 与第一半导体层保持欧姆接触的第一主电极; 以及与第三区域的一部分欧姆接触的第二主电极,第三区域的表面用作光接收表面。

    High voltage thyristor with optimized doping, thickness, and sheet
resistivity for cathode base layer
    9.
    发明授权
    High voltage thyristor with optimized doping, thickness, and sheet resistivity for cathode base layer 失效
    具有优化的阴极基底层的掺杂,厚度和薄层电阻率的高压晶闸管

    公开(公告)号:US4682199A

    公开(公告)日:1987-07-21

    申请号:US489505

    申请日:1983-04-28

    IPC分类号: H01L29/10 H01L29/74

    CPC分类号: H01L29/7428 H01L29/102

    摘要: In a high-voltage thyristor comprising a semiconductor body having contiguous pnpn four layers, and opposed anode and cathode electrodes and a gate electrode provided for the semiconductor body, one of p-base and n-base regions having an impurity concentration higher than the other has an impurity concentration which is no more than 8.times.10.sup.15 atoms/cm.sup.3 in the vicinity of a junction between the one base region and an adjacent emitter region and which has a gradually decreasing gradient toward the other contiguous base region. The one base region has a sheet resistance of 500 to 1500 ohms/.quadrature.. The realization of a high-voltage, large-diameter and large-current thyristor can be ensured.

    摘要翻译: 在包括具有相邻pnpn四层的半导体本体和相对的阳极和阴极电极以及为半导体本体提供的栅电极的高压晶闸管中,杂质浓度高于另一半导体的p基极和n基区中的一个 在一个基极区域和相邻的发射极区域之间的结的附近具有不大于8×10 15原子/ cm 3的杂质浓度,并且朝向另一个连续的基极区域具有逐渐降低的梯度。 一个基本区域的薄层电阻为500至1500欧姆/平方厘米。 可以确保高电压,大直径和大电流晶闸管的实现。

    High breakdown voltage semiconductor device
    10.
    发明授权
    High breakdown voltage semiconductor device 失效
    高击穿电压半导体器件

    公开(公告)号:US4388635A

    公开(公告)日:1983-06-14

    申请号:US164946

    申请日:1980-07-01

    IPC分类号: H01L29/06 H01L29/40 H01L29/74

    摘要: A novel structure of a high breakdown voltage semiconductor device has a pair of major surfaces on which a pair of main electrodes are formed and a PN junction formed between the pair of major surfaces with a side surface to which the PN junction is exposed being covered with a passivation material. An auxiliary electrode of a conductive member is provided, which is disposed externally of the peripheral edge of the major surface of the semiconductor substrate, and which contacts to the passivation material and is electrically connected to the main electrode. When a voltage for reverse biasing the PN junction is applied between the pair of main electrodes, ions in the passivation material are collected by an electric field established in the passivation material so that the deterioration of the breakdown on the surface of the semiconductor substrate is prevented.

    摘要翻译: 高击穿电压半导体器件的新颖结构具有一对主表面,其上形成有一对主电极,并且在一对主表面之间形成有PN结被暴露的侧表面覆盖的PN结 钝化材料。 提供了一种导电构件的辅助电极,其设置在半导体衬底的主表面的外围边缘的外侧,并与钝化材料接触并与主电极电连接。 当在一对主电极之间施加用于反向偏置PN结的电压时,通过在钝化材料中建立的电场来收集钝化材料中的离子,从而防止半导体衬底的表面上的击穿劣化 。