摘要:
A III-nitride light emitting layer is disposed between an n-type region and a p-type region in a double heterostructure. At least a portion of the III-nitride light emitting layer has a graded composition.
摘要:
A III-nitride light emitting layer is disposed between an n-type region and a p-type region in a double heterostructure. At least a portion of the III-nitride light emitting layer has a graded composition.
摘要:
In a device, a III-nitride light emitting layer is disposed between an n-type region and a p-type region. A first spacer layer, which is disposed between the n-type region and the light emitting layer, is doped to a dopant concentration between 6×1018 cm−3 and 5×1019 cm−3. A second spacer layer, which is disposed between the p-type region and the light emitting layer, is not intentionally doped or doped to a dopant concentration less than 6×1018 cm−3.
摘要翻译:在器件中,III族氮化物发光层设置在n型区域和p型区域之间。 设置在n型区域和发光层之间的第一间隔层被掺杂到6×10 18 cm -3和5×10 19 cm -3之间的掺杂剂浓度。 设置在p型区域和发光层之间的第二间隔层不是有意地掺杂或掺杂到小于6×10 18 cm -3的掺杂剂浓度。
摘要:
A III-nitride device includes a first n-type layer, a first p-type layer, and an active region separating the first p-type layer and the first n-type layer. The device may include a second n-type layer and a tunnel junction separating the first and second n-type layers. First and second contacts are electrically connected to the first and second n-type layers. The first and second contacts are formed from the same material, a material with a reflectivity to light emitted by the active region greater than 75%. The device may include a textured layer disposed between the second n-type layer and the second contact or formed on a surface of a growth substrate opposite the device layers.
摘要:
A III-nitride light emitting layer in a semiconductor light emitting device has a graded composition. The composition of the light emitting layer may be graded such that the change in the composition of a first element is at least 0.2% per angstrom of light emitting layer. Grading in the light emitting layer may reduce problems associated with polarization fields in the light emitting layer. The light emitting layer may be, for example InxGa1−xN, AlxGa1−xN, or InxAlyGa1−x−yN.
摘要翻译:半导体发光器件中的III族氮化物发光层具有渐变组成。 发光层的组成可以分级,使得第一元素的组成的变化为每发光层的至少0.2%。 在发光层中的分级可以减少与发光层中的极化场相关的问题。 发光层可以是例如在N 1 Ga 1-x N,Al x Ga 1-x N 2 > N,或在<! - SIPO - >中。
摘要:
Heterostructure designs are disclosed that may increase the number of charge carriers available in the quantum well layers of the active region of III-nitride light emitting devices such as light emitting diodes. In a first embodiment, a reservoir layer is included with a barrier layer and quantum well layer in the active region of a light emitting device. In some embodiments, the reservoir layer is thicker than the barrier layer and quantum well layer, and has a greater indium composition than the barrier layer and a smaller indium composition than the quantum well layer. In some embodiments, the reservoir layer is graded. In a second embodiment, the active region of a light emitting device is a superlattice of alternating quantum well layers and barrier layers. In some embodiments, the barrier layers are thin such that charge carriers can tunnel between quantum well layers through a barrier layer.
摘要:
A semiconductor light emitting device includes a light emitting layer disposed between an n-type region and a p-type region. The light emitting layer may be a wurtzite III-nitride layer with a thickness of at least 50 angstroms. The light emitting layer may have a polarization reversed from a conventional wurtzite III-nitride layer, such that across an interface between the light emitting layer and the p-type region, the wurtzite c-axis points toward the light emitting layer. Such an orientation of the c-axis may create a negative sheet charge at an interface within or at the edge of the p-type region, providing a barrier to charge carriers in the light emitting layer.
摘要:
The present invention provides methods for forming at least partially relaxed strained material layers on a target substrate. The methods include forming islands of the strained material layer on an intermediate substrate, at least partially relaxing the strained material islands by a first heat treatment, and transferring the at least partially relaxed strained material islands to the target substrate. The at least partial relaxation is facilitated by the presence of low-viscosity or compliant layers adjacent to the strained material layer. The invention also provides semiconductor structures having an at least partially relaxed strained material layer, and semiconductor devices fabricated using an at least partially relaxed strained material layer.
摘要:
Methods of fabricating relaxed layers of semiconductor materials include forming structures of a semiconductor material overlying a layer of a compliant material, and subsequently altering a viscosity of the compliant material to reduce strain within the semiconductor material. The compliant material may be reflowed during deposition of a second layer of semiconductor material. The compliant material may be selected so that, as the second layer of semiconductor material is deposited, a viscosity of the compliant material is altered imparting relaxation of the structures. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Methods of fabricating semiconductor structures and devices are also disclosed. Novel intermediate structures are formed during such methods. Engineered substrates include a plurality of structures comprising a semiconductor material disposed on a layer of material exhibiting a changeable viscosity.
摘要:
The present invention provides methods for forming at least partially relaxed strained material layers on a target substrate. The methods include forming islands of the strained material layer on an intermediate substrate, at least partially relaxing the strained material islands by a first heat treatment, and transferring the at least partially relaxed strained material islands to the target substrate. The at least partial relaxation is facilitated by the presence of low-viscosity or compliant layers adjacent to the strained material layer. The invention also provides semiconductor structures having an at least partially relaxed strained material layer, and semiconductor devices fabricated using an at least partially relaxed strained material layer.