SEMICONDUCTOR PACKAGE
    2.
    发明公开

    公开(公告)号:US20230387054A1

    公开(公告)日:2023-11-30

    申请号:US18120866

    申请日:2023-03-13

    发明人: Junyoung KO

    IPC分类号: H01L23/00

    摘要: A semiconductor package is provided. The semiconductor package includes a substrate including first and second surfaces opposite to each other, a redistribution layer on the first surface and having third and fourth surfaces opposite to each other wherein the third surface of the redistribution layer faces the first surface, a semiconductor chip between the substrate and the redistribution layer, the semiconductor chip spaced apart from the first surface and electrically connected to the third surface, a connection structure between the substrate and the redistribution layer and horizontally spaced apart from the semiconductor chip wherein the connection structure is electrically connected to the first surface and the third surface, and a dielectric layer between the substrate and the redistribution layer. The dielectric layer covers the semiconductor chip and the connection structure and extends between the semiconductor chip and the first surface.

    Semiconductor die with die pad pattern
    5.
    发明授权
    Semiconductor die with die pad pattern 有权
    半导体晶片具有芯片焊盘图案

    公开(公告)号:US07834466B2

    公开(公告)日:2010-11-16

    申请号:US11957838

    申请日:2007-12-17

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: A structure includes a semiconductor die that has an arrangement of die pads on a surface of the semiconductor die. A first row of die pads consists of a first group of four die pads and run in a first direction. A second row of die pads are adjacent to the first row and consist of a second group of four die pads running in the first direction. The second row begins at a first offset in the first direction from where the first row begins. A third row of die pads are adjacent to the second row and comprise a third group of four die pads that run in the first direction. The third row begins at a second offset in the first direction from where the second row begins. This allows for relatively easy access to all of the die pads.

    摘要翻译: 一种结构包括半导体管芯,其具有在半导体管芯的表面上的管芯焊盘的布置。 第一排管芯焊盘由第一组四个焊盘组成,并沿第一方向延伸。 第二排管芯焊盘与第一行相邻并且由在第一方向上延伸的第二组四个焊盘组成。 第二行从第一行开始的第一个方向的第一个偏移开始。 第三排管芯焊盘与第二排相邻,并且包括在第一方向上延伸的第三组四个焊盘。 第三行从第二行开始的第一个方向的第二个偏移开始。 这允许相对容易地访问所有的管芯焊盘。

    STRUCTURE WITH DIE PAD PATTERN
    7.
    发明申请
    STRUCTURE WITH DIE PAD PATTERN 有权
    结构与DIE PAD PATTERN

    公开(公告)号:US20090152718A1

    公开(公告)日:2009-06-18

    申请号:US11957838

    申请日:2007-12-17

    IPC分类号: H01L23/488

    摘要: A structure includes a semiconductor die that has an arrangement of die pads on a surface of the semiconductor die. A first row of die pads consists of a first group of four die pads and run in a first direction. A second row of die pads are adjacent to the first row and consist of a second group of four die pads running in the first direction. The second row begins at a first offset in the first direction from where the first row begins. A third row of die pads are adjacent to the second row and comprise a third group of four die pads that run in the first direction. The third row begins at a second offset in the first direction from where the second row begins. This allows for relatively easy access to all of the die pads.

    摘要翻译: 一种结构包括半导体管芯,其具有在半导体管芯的表面上的管芯焊盘的布置。 第一排管芯焊盘由第一组四个焊盘组成,并沿第一方向延伸。 第二排管芯焊盘与第一行相邻并且由在第一方向上延伸的第二组四个焊盘组成。 第二行从第一行开始的第一个方向的第一个偏移开始。 第三排管芯焊盘与第二排相邻,并且包括在第一方向上延伸的第三组四个焊盘。 第三行从第二行开始的第一个方向的第二个偏移开始。 这允许相对容易地访问所有的管芯焊盘。