公开(公告)号：US20060285255A1

公开(公告)日：2006-12-21

申请号：US11400407

申请日：2006-04-10

Applicant: Takashi Kawakubo ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki

Inventor： Takashi Kawakubo ,  Toshihiko Nagano ,  Kazuhide Abe ,  Michihiko Nishigaki

IPC: G11B21/24

CPC classification number: B81B3/0021 ,  B81B2201/014 ,  B81B2201/045 ,  G02B26/0858 ,  H01G5/18 ,  H01G5/40 ,  H01H2057/006

Abstract: A micro-mechanical device includes a first piezoelectric actuator including a piezoelectric film, and lower and upper electrodes interleaving the piezoelectric film, and extending from a first fixing part on a substrate to a first operating end, and a second piezoelectric actuator connected to the first piezoelectric actuator via a connecting part at the first operating end of the first piezoelectric actuator, and extending from the connecting part to a second operating end, the second piezoelectric actuator being shorter than the first piezoelectric actuator.

公开(公告)号：US07135940B2

公开(公告)日：2006-11-14

申请号：US11039872

申请日：2005-01-24

Applicant: Takashi Kawakubo ,  Ryoichi Ohara ,  Kazuhide Abe ,  Hiroshi Yoshida ,  Hiroshi Tsurumi

Inventor： Takashi Kawakubo ,  Ryoichi Ohara ,  Kazuhide Abe ,  Hiroshi Yoshida ,  Hiroshi Tsurumi

IPC: H03H21/00 ,  H03H9/54 ,  H03H9/64

CPC classification number: H03J3/08 ,  H03H9/542 ,  H03H9/605 ,  H03H2210/012 ,  H03H2210/015 ,  H03J1/0008

Abstract: A tunable filter has a plurality of variable capacitors and a plurality of inductor elements, each being formed on a common substrate, a filter circuit formed by using at least a portion of the plurality of variable capacitors and a portion of the plurality of inductor elements, a monitor circuit formed by using at least a portion of the plurality of variable capacitors and a portion of the plurality of inductor elements, a detecting circuit which detects a prescribed circuit constant of the monitor circuit, a storage which stores information relating to a reference circuit constant of the monitor circuit, and a capacitance control circuit which controls capacitance of the variable capacitors in the monitor circuit and capacitance of the variable capacitors in the filter circuit, based on a result detected by the detecting circuit and information stored in the storage.

Abstract translation: 可调谐滤波器具有多个可变电容器和多个电感器元件，每个电感器元件形成在公共基板上，通过使用多个可变电容器的至少一部分和多个电感器元件的一部分形成的滤波器电路， 通过使用多个可变电容器的至少一部分和多个电感器元件的一部分形成的监视电路，检测监视电路的规定电路常数的检测电路，存储与参考电路有关的信息的存储器 基于由检测电路检测的结果和存储在存储器中的信息，控制监视电路中的可变电容器的电容和滤波器电路中的可变电容器的电容的电容控制电路。

公开(公告)号：US20060226457A1

公开(公告)日：2006-10-12

申请号：US11393830

申请日：2006-03-31

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L29/94

CPC classification number: H01L27/11507 ,  H01L27/105 ,  H01L27/11502 ,  H01L27/11509 ,  H01L28/57 ,  H01L28/65

Abstract: A ferroelectric memory device has a lower insulating film (first insulating film) formed on a semiconductor substrate. A ferroelectric capacitor structure is formed on the lower insulating film. The ferroelectric capacitor structure is created by layering in order a lower electrode, ferroelectric layer and upper electrode. The ferroelectric memory device also has an upper insulating film (fifth insulating film) which covers the ferroelectric capacitor structure. A wiring layer is formed over the upper insulating film. An aluminum oxide film of thickness 5 to 50 nm is formed so as to cover the wiring layer and upper insulating film.

Abstract translation: 铁电存储器件具有形成在半导体衬底上的下绝缘膜（第一绝缘膜）。 在下绝缘膜上形成铁电电容器结构。 铁电电容器结构通过按照下电极，铁电层和上电极的分层来形成。 铁电存储器件还具有覆盖铁电体电容器结构的上绝缘膜（第五绝缘膜）。 在上绝缘膜上形成布线层。 形成厚度为5〜50nm的氧化铝膜，以覆盖布线层和上绝缘膜。

公开(公告)号：US20060014380A1

公开(公告)日：2006-01-19

申请号：US11230525

申请日：2005-09-21

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L21/4763

CPC classification number: H01L23/53295 ,  H01L21/2885 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a wiring structure of a semiconductor device, dielectric tolerance of the wiring is improved by preventing diffusion of the wiring material. The wiring structure of the semiconductor device includes a first insulating film having plural grooves, plural wiring films formed protrusively above tops of the first insulating film among the grooves, plural barrier films formed on bottoms of the wiring films and up to a higher position than the tops on sides of the wiring films, first cap films comprising metal films formed on tops of the wiring films, and a second cap film formed on at least respective sides of the first cap films and the barrier films.

Abstract translation: 在半导体器件的布线结构中，通过防止布线材料的扩散，提高布线的电介质公差。 半导体器件的布线结构包括具有多个沟槽的第一绝缘膜，多个布线膜，突出地形成在沟槽中的第一绝缘膜的顶部之上，多个阻挡膜形成在布线膜的底部上方，高于 布线膜侧面的顶部，包含形成在布线膜的顶部的金属膜的第一盖膜，以及形成在第一盖膜和阻挡膜的至少两侧的第二盖膜。

公开(公告)号：US06969911B2

公开(公告)日：2005-11-29

申请号：US10760457

申请日：2004-01-21

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L21/288 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/48 ,  H01L23/52 ,  H01L23/532 ,  H01L29/40

CPC classification number: H01L23/53295 ,  H01L21/2885 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In a wiring structure of a semiconductor device, dielectric tolerance of the wiring is improved by preventing diffusion of the wiring material. The wiring structure of the semiconductor device includes a first insulating film having plural grooves, plural wiring films formed protrusively above tops of the first insulating film among the grooves, plural barrier films formed on bottoms of the wiring films and up to a higher position than the tops on sides of the wiring films, first cap films including metal films formed on tops of the wiring films, and a second cap film formed on at least respective sides of the first cap films and the barrier films.

Abstract translation: 在半导体器件的布线结构中，通过防止布线材料的扩散，提高布线的电介质公差。 半导体器件的布线结构包括具有多个沟槽的第一绝缘膜，多个布线膜，突出地形成在沟槽中的第一绝缘膜的顶部之上，多个阻挡膜形成在布线膜的底部上方，高于 在布线膜的两侧的顶部，包括形成在布线膜的顶部的金属膜的第一盖膜以及形成在第一盖膜和阻挡膜的至少各个侧面上的第二盖膜。

公开(公告)号：US06967157B2

公开(公告)日：2005-11-22

申请号：US11109634

申请日：2005-04-20

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L21/3205 ,  H01L21/302 ,  H01L21/304 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/7685 ,  H01L21/7684 ,  H01L21/76867

Abstract: A method of forming buried wiring, includes the steps of forming an insulating layer having a trench on a semiconductor substrate; forming a conductive layer mainly composed of copper on the insulating layer in such a manner that the trench is filled with the conductive layer; removing an oxide layer generated in a surface of the conductive layer by oxidation; forming a cap layer made of a material having less mechanical strength than the oxide layer, on the conductive layer; and removing the cap layer and a part of the conductive layer by chemical mechanical polishing in such a manner that the conductive layer is left in the trench.

Abstract translation: 一种形成掩埋布线的方法包括以下步骤：在半导体衬底上形成具有沟槽的绝缘层; 在所述绝缘层上形成主要由铜构成的导电层，以使所述沟槽填充有所述导电层; 通过氧化去除在导电层的表面中产生的氧化物层; 在所述导电层上形成由具有比所述氧化物层更小的机械强度的材料制成的盖层; 并且通过化学机械抛光以导电层留在沟槽中的方式去除覆盖层和导电层的一部分。

公开(公告)号：US06903020B2

公开(公告)日：2005-06-07

申请号：US10765155

申请日：2004-01-28

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L21/3205 ,  H01L21/302 ,  H01L21/304 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/7685 ,  H01L21/7684 ,  H01L21/76867

Abstract: A method of forming buried wiring, includes the steps of forming an insulating layer having a trench on a semiconductor substrate; forming a conductive layer mainly composed of copper on the insulating layer in such a manner that the trench is filled with the conductive layer; removing an oxide layer generated in a surface of the conductive layer by oxidation; forming a cap layer made of a material having less mechanical strength than the oxide layer, on the conductive layer; and removing the cap layer and a part of the conductive layer by chemical mechanical polishing in such a manner that the conductive layer is left in the trench.

公开(公告)号：US20050059375A1

公开(公告)日：2005-03-17

申请号：US10890998

申请日：2004-07-15

Applicant: Kazuhide Abe ,  Mayumi Morizuka ,  Ryoichi Ohara ,  Kenya Sano ,  Naoko Yanase ,  Takaaki Yasumoto ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Yoshida ,  Ryuichi Fujimoto ,  Keiichi Yamaguchi ,  Nobuyuki Itoh ,  Tooru Kozu ,  Takeshi Ookubo

Inventor： Kazuhide Abe ,  Mayumi Morizuka ,  Ryoichi Ohara ,  Kenya Sano ,  Naoko Yanase ,  Takaaki Yasumoto ,  Tadahiro Sasaki ,  Kazuhiko Itaya ,  Takashi Kawakubo ,  Hiroshi Yoshida ,  Ryuichi Fujimoto ,  Keiichi Yamaguchi ,  Nobuyuki Itoh ,  Tooru Kozu ,  Takeshi Ookubo

IPC: H03K3/354 ,  H03B1/00 ,  H03B5/30 ,  H03B5/32 ,  H03H9/17 ,  H03L7/08 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/113 ,  H03L7/18 ,  H03L7/187 ,  H03L7/199 ,  H04B1/06 ,  H04B7/00 ,  H04B17/00

CPC classification number: H03L7/099 ,  H03B5/326 ,  H03B2200/0012 ,  H03B2201/0208 ,  H03B2201/025 ,  H03L7/0891 ,  H03L7/10 ,  H03L7/113 ,  H03L7/18 ,  H03L7/199 ,  H03L2207/06

Abstract: A voltage controlled oscillator includes a resonator configured to resonate with an initial oscillation frequency during starting period of oscillation and a steady oscillation frequency during a steady state oscillation. The resonator includes a film bulk acoustic resonator having a series resonance frequency higher than the steady oscillation frequency. A negative resistance circuit configured to drive the resonator, has a positive increment for reactance in the steady state oscillation compared with reactance in the starting period.

Abstract translation: 压控振荡器包括谐振器，其构造成在振荡的起始周期期间与初始振荡频率谐振，并且在稳态振荡期间具有稳定的振荡频率。 谐振器包括具有高于稳定振荡频率的串联谐振频率的膜体声波谐振器。 配置为驱动谐振器的负电阻电路与起动周期中的电抗相比，在稳态振荡中具有正增量。

公开(公告)号：US06767826B2

公开(公告)日：2004-07-27

申请号：US10392933

申请日：2003-03-21

Applicant: Kazuhide Abe

Inventor： Kazuhide Abe

IPC: H01L214763

CPC classification number: H01L21/7684 ,  H01L21/76807 ,  H01L21/76829 ,  H01L23/522

Abstract: A first insulating layer is formed on first wiring and thereafter an etching resistant film is formed thereon. A lower layer portion of a second insulating layer is formed on the etching resistant film. Upon etching for forming dummy trenches, the rate of etching of the etching resistant film is less than or equal to one-tenth the rate of etching of the insulating layer. Therefore, the etching resistant film functions as an etching stopper and the etching thereof does not proceed to the first insulating layer. Thus, the interval between the corresponding first wiring and a second wiring can be reliably maintained and an increase in parasitic capacitance is hence prevented. An insulator lying within a wiring section is made unnecessary while a dishing phenomenon is prevented, by bottom-up filling of a copper-plated film due to the dummy trenches. Thus, wiring resistance is prevented from increasing.

Abstract translation: 在第一布线上形成第一绝缘层，然后在其上形成耐蚀刻膜。 第二绝缘层的下层部分形成在耐蚀刻膜上。 在蚀刻形成虚拟沟槽时，耐腐蚀膜的蚀刻速率小于或等于绝缘层蚀刻速率的十分之一。 因此，耐腐蚀膜用作蚀刻阻挡层，并且其蚀刻不会进行到第一绝缘层。 因此，可以可靠地保持对应的第一布线和第二布线之间的间隔，从而防止寄生电容的增加。 通过由虚拟沟槽自下而上填充镀铜膜，不需要位于布线部内的绝缘体，同时防止凹陷现象。 因此，防止布线电阻增加。

公开(公告)号：US6060735A

公开(公告)日：2000-05-09

申请号：US923123

申请日：1997-09-04

Applicant: Mitsuaki Izuha ,  Noburu Fukushima ,  Kazuhide Abe

Inventor： Mitsuaki Izuha ,  Noburu Fukushima ,  Kazuhide Abe

IPC: H01L21/02 ,  H01L29/78 ,  H01L33/00

CPC classification number: H01L28/75 ,  H01L28/55

Abstract: A thin film dielectric device is disclosed, that comprises a substrate, a lower electrode formed on the substrate and composed of a laminate film having columnar grains that have grown in a vertical to a surface of the substrate, a dielectric thin film formed on the lower electrode and composed of a perovskite oxide, the dielectric thin film being a polycrystalline film having columnar grains that have successively grown from the columnar grains of the lower electrode and that takes over a crystal orientation of the lower electrode, the lattice constant of the lower electrode being matched with the lattice constant of the dielectric thin film at the interface therebetween with the columnar grains, and an upper electrode formed on the dielectric thin film. The lattice matching of the columnar grains solves problems of the increase of the leak current of the thin film dielectric device and the degradation of the dielectric breakdown resistance. In addition, the polycrystalline film having the columnar grains that succeed at the interface of the electrode/dielectric thin film can be properly formed on the semiconductor substrate such as Si substrate. Thus, the thin film dielectric device according to the present invention can be applied to a real LSI circuit and so forth.

Abstract translation: 公开了一种薄膜电介质器件，其包括：衬底，形成在衬底上的下电极，由具有在垂直于衬底表面生长的柱状晶粒的层压膜构成;电介质薄膜，形成在下层 电极，由钙钛矿氧化物构成，所述电介质薄膜是具有从下部电极的柱状晶粒连续生长并且接受下部电极的晶体取向的柱状晶粒的多晶膜，下部电极的晶格常数 与介电薄膜在与柱状晶粒之间的界面处的晶格常数和形成在电介质薄膜上的上电极匹配。 柱状晶粒的晶格匹配解决了薄膜电介质器件的漏电流增加和介电击穿电阻的劣化的问题。 此外，可以在诸如Si衬底的半导体衬底上适当地形成具有在电极/电介质薄膜的界面处成功的柱状晶粒的多晶膜。 因此，根据本发明的薄膜电介质器件可以应用于真正的LSI电路等。