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125 条记录 (耗时 0.04 秒)

    SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING IT
    93.
    发明申请
    SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING IT 有权
    半导体元件及其生产方法

    公开(公告)号：US20080237701A1

    公开(公告)日：2008-10-02

    申请号：US11866662

    申请日：2007-10-03

    申请人： Armin Willmeroth ,  Michael Rueb ,  Carolin Tolksdorf ,  Markus Schmitt

    发明人： Armin Willmeroth ,  Michael Rueb ,  Carolin Tolksdorf ,  Markus Schmitt

    IPC分类号： H01L29/76 ,  H01L21/425

    CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/402

    摘要： A semiconductor component includes a semiconductor body having an edge with an edge zone of a first conductivity type. Charge compensation regions of a second conductivity type are embedded into the edge zone, with the charge compensation regions extending from a top side of the semiconductor component vertically into the semiconductor body. For the number Ns of charge carriers present in a volume Vs between two charge compensation regions that are adjacent in a direction perpendicular to the edge, and for the number Np of charge carriers present in a volume Vp between two charge compensation regions that are adjacent in a direction parallel to the edge, Np>Ns holds true.

    摘要翻译： 半导体部件包括具有边缘的第一导电类型的边缘区域的半导体本体。 第二导电类型的电荷补偿区域被嵌入到边缘区域中，电荷补偿区域从半导体组件的顶侧垂直延伸到半导体本体中。 对于在垂直于边缘的方向上相邻的两个电荷补偿区域之间存在的体积V S s中存在的电荷载体的数量N SUB，以及数字N < 在与边缘平行的方向上相邻的两个电荷补偿区域之间存在于体积V p p中的电荷载体的SUB> p N N 成立。

    Lateral MISFET and method for fabricating it
    96.
    发明申请
    Lateral MISFET and method for fabricating it 有权
    侧面MISFET及其制造方法

    公开(公告)号：US20060261384A1

    公开(公告)日：2006-11-23

    申请号：US11276782

    申请日：2006-03-14

    申请人： Michael Rueb ,  Markus Schmitt ,  Carolin Tolksdorf ,  Uwe Wahl ,  Armin Willmeroth

    发明人： Michael Rueb ,  Markus Schmitt ,  Carolin Tolksdorf ,  Uwe Wahl ,  Armin Willmeroth

    IPC分类号： H01L29/76

    CPC分类号： H01L29/782 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/7825

    摘要： A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconductor substrate. This MISFET has, on the top side of the semiconductor body, a drain, a source, and a gate electrode with gate insulator. A semiconductor zone of the first conduction type is embedded in the epitaxial layer in a manner adjoining the gate insulator, a drift zone of the second conduction type being arranged between the semiconductor zone and the drain electrode in the epitaxial layer. The drift zone has pillar-type regions which are arranged in rows and columns and whose boundary layers have a metal layer which in each case forms a Schottky contact with the material of the drift zone.

    摘要翻译： 具有半导体本体的横向MISFET具有第一导电类型的掺杂半导体衬底和与第一导电类型互补的第二导电类型的外延层，外延层设置在半导体衬底上。 该MISFET在半导体本体的顶侧具有漏极，源极和具有栅极绝缘体的栅电极。 第一导电类型的半导体区域以与栅极绝缘体相邻的方式嵌入在外延层中，第二导电类型的漂移区被布置在外延层中的半导体区域和漏极之间。 漂移区具有排列成行和列的柱状区域，其边界层具有金属层，其在每种情况下与漂移区的材料形成肖特基接触。

    Power Semiconductor Component with Plate Capacitor Structure
    97.
    发明申请
    Power Semiconductor Component with Plate Capacitor Structure 有权
    功率半导体元件与板电容结构

    公开(公告)号：US20060261375A1

    公开(公告)日：2006-11-23

    申请号：US11382838

    申请日：2006-05-11

    申请人： Uwe Wahl ,  Armin Willmeroth

    发明人： Uwe Wahl ,  Armin Willmeroth

    IPC分类号： H01L29/76

    CPC分类号： H01L29/402 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7803 ,  H01L29/7811 ,  H01L29/7817 ,  H01L29/7823

    摘要： A power semiconductor component (1) contains a weakly doped drift zone (9), a drain zone (10) and a MOS structure (12) situated at the front side (2) of the power semiconductor component (1). An edge plate (6) of the first conductivity type is provided at its edge (8) above the drift zone (9). The edge plate (6) is doped more highly than the drift zone (9). Situated above the edge plate (6) is an insulation layer (24) with an overlying field plate (7) made of polysilicon. The field plate (7) forms together with the edge plate (6) a plate capacitor structure which increases the drain-source output capacitance of the power semiconductor component (1), so that fewer radiofrequency interference disturbances are caused by the power semiconductor component (1) during switching.

    摘要翻译： 功率半导体部件（1）包含位于功率半导体部件（1）的前侧（2）的弱掺杂漂移区（9），漏极区（10）和MOS结构（12）。 第一导电类型的边缘板（6）设置在漂移区（9）上方的边缘（8）处。 边缘板（6）的掺杂比漂移区（9）更高。 位于边缘板（6）上方的是具有由多晶硅制成的上覆场板（7）的绝缘层（24）。 场板（7）与边缘板（6）一起形成板电容器结构，其增加功率半导体部件（1）的漏 - 源输出电容，使得由功率半导体部件（1）引起更少的射频干扰干扰 1）切换期间。

    IGBT with monolithic integrated antiparallel diode
    98.
    发明授权
    IGBT with monolithic integrated antiparallel diode 有权
    IGBT采用单片集成反并联二极管

    公开(公告)号：US07112868B2

    公开(公告)日：2006-09-26

    申请号：US10698082

    申请日：2003-10-30

    申请人： Armin Willmeroth ,  Hans-Joachim Schulze ,  Holger Huesken ,  Erich Griebl

    发明人： Armin Willmeroth ,  Hans-Joachim Schulze ,  Holger Huesken ,  Erich Griebl

    IPC分类号： H01L29/732

    CPC分类号： H01L29/861 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/7395 ,  H01L2224/0603 ,  H01L2224/4903 ,  H01L2924/13055 ,  H01L2924/00

    摘要： An IGBT with monolithic integrated antiparallel diode has one or more emitter short regions forming the diode cathode in the region of the high-voltage edge. The p-type emitter regions of the IGBT have no emitter shorts. The counterelectrode of the diode exclusively comprises p-type semiconductor wells on the front side of the device. Particularly in applications, such as lamp ballast, in which the diode of the IGBT is firstly forward-biased, hard commutation is not effected and the current reversal takes place relatively slowly. The emitter short regions may be strips or points below the high-voltage edge. The horizontal bulk resistance is increased and the snapback effect is reduced without reducing the robustness in the edge region. In a second embodiment, the IGBT is produced using thin wafer technology and the thickness of the substrate defining the inner zone is less than 200 μm. The thickness of the emitter region or of the emitter regions and short region(s) is less than 1 μm. A transparent emitter is preferable in this case.

    摘要翻译： 具有单片集成反并联二极管的IGBT具有在高压边缘的区域中形成二极管阴极的一个或多个发射极短路区域。 IGBT的p型发射极区域没有发射极短路。 二极管的反电极仅在器件前侧包含p型半导体阱。 特别是在其中IGBT的二极管首先被正向偏置的诸如灯镇流器的应用中，不会进行硬换向，并且电流反转相对缓慢地发生。 发射极短区域可以是高压边缘以下的条带或点。 水平体积电阻增加，并且在不降低边缘区域的鲁棒性的情况下降低了回弹效应。 在第二实施例中，使用薄晶片技术制造IGBT，并且限定内部区域的衬底的厚度小于200μm。 发射极区域或发射极区域和短区域的厚度小于1um。 在这种情况下，优选透明发光体。

    Method for forming a channel zone of a transistor and NMOS transistor
    99.
    发明授权
    Method for forming a channel zone of a transistor and NMOS transistor 失效
    用于形成晶体管和NMOS晶体管的沟道区的方法

    公开(公告)号：US07038272B2

    公开(公告)日：2006-05-02

    申请号：US10631350

    申请日：2003-07-31

    申请人： Hans Weber ,  Dirk Ahlers ,  Uwe Wahl ,  Jenö Tihanyi ,  Armin Willmeroth

    发明人： Hans Weber ,  Dirk Ahlers ,  Uwe Wahl ,  Jenö Tihanyi ,  Armin Willmeroth

    IPC分类号： H01L29/76

    CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7395 ,  H01L29/7816

    摘要： In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.

    摘要翻译： 在场效应晶体管中形成沟道区的方法中，在要形成的沟道区之上形成多晶硅层。 多晶硅层用作用于随后掺杂沟道区的掩模基板。 在栅极区域中具有空穴的多晶硅层的有利图案化以及源极区域中的柱状物使得能够更容易地掺杂沟道区。 在另一个实施例中，新颖的方法用于PMOS晶体管单元的沟道宽度阴影。