公开(公告)号：US12099091B2

公开(公告)日：2024-09-24

申请号：US17866342

申请日：2022-07-15

Applicant: Advanced Micro Devices, Inc.

Inventor： Songgan Zang ,  Qi Shao ,  Lifeng Zhang ,  Ahmet Tokuz ,  Lu Lu

IPC: G01R31/3185 ,  G01R31/28

CPC classification number: G01R31/318583 ,  G01R31/2834 ,  G01R31/318513 ,  G01R31/318572

Abstract: A system and method for efficiently routing scan data between two dies used in three-dimensional packaging are described. In various implementations, a computing system includes at least a first semiconductor die (or first die) and a second die connected to one another within a three-dimensional (3D) package. The first die and the second die have multiple non-scan input/output (I/O) data channels between them for data transfer. The non-scan I/O data channels are partitioned into groups. The first die receives a given scan input data bit for testing a device under test (DUT) on the second die. The first die selects a first group of non-scan I/O data channels, and sends, to the second die, a copy of the given scan input data bit on each non-scan I/O data channel of the first group. The second die uses a voter circuit to determine the value of the given scan input data bit.

公开(公告)号：US20240314934A1

公开(公告)日：2024-09-19

申请号：US18121487

申请日：2023-03-14

Applicant: Advanced Micro Devices, Inc.

Inventor： Gamal REFAI-AHMED ,  Suresh RAMALINGAM ,  Aslam YEHIA ,  Chi-Yi CHAO ,  Md Malekkul ISLAM ,  Hoa DO

IPC: H05K1/18 ,  H05K5/00 ,  H05K7/10 ,  H05K7/20

CPC classification number: H05K1/181 ,  H05K5/0026 ,  H05K7/10 ,  H05K7/20836

Abstract: An electronic device having a frame for coupling a plurality of thermal management devices to the printed circuit board is provided. The electronic device includes a first chip package mounted to the PCB and a second chip package mounted to the PCB. The frame is secured to the PCB, and the frame has a first aperture disposed over the first chip package and a second aperture disposed over the second chip package. The plurality of thermal management devices coupled to the frame includes a first thermal management device contacting an IC die of the first chip package through the first aperture and a second thermal management device contacting an IC die of the second chip package through the second aperture.

公开(公告)号：US20240295898A1

公开(公告)日：2024-09-05

申请号：US18663864

申请日：2024-05-14

Applicant: Advanced Micro Devices, Inc.

Inventor： Anwar Kashem ,  Craig Daniel Eaton ,  Pouya Najafi Ashtiani ,  Deepesh John

IPC: G06F1/08 ,  H03K5/00 ,  H03K5/22

CPC classification number: G06F1/08 ,  H03K5/22 ,  H03K2005/00286

Abstract: Methods and systems are disclosed for clock delay compensation in a multiple chiplet system. Techniques disclosed include distributing, by a clock generator, a clock signal across distribution trees of respective chiplets; measuring phases, by phase detectors, where each phase measurement is associated with a chiplet of the chiplets and is indicative of a propagation speed of the clock signal through the distribution tree of the chiplet. Then, for each chiplet, techniques are further disclosed that determine, by a microcontroller, based on the phase measurements associated with the chiplet, a delay offset, and that delay, based on the delay offset, the propagation of the clock signal through the distribution tree of the chiplet using a delay unit associated with the chiplet.

公开(公告)号：US12080032B2

公开(公告)日：2024-09-03

申请号：US17352809

申请日：2021-06-21

Applicant: Advanced Micro Devices, Inc.

Inventor： Konstantine Iourcha ,  John W. Brothers

IPC: G06T9/00 ,  G06T1/20 ,  G06T15/00 ,  G06F12/0875 ,  G06F12/109

CPC classification number: G06T9/00 ,  G06T1/20 ,  G06T15/005 ,  G06F12/0875 ,  G06F12/109 ,  G06F2212/401 ,  G06F2212/455 ,  G06F2212/657

Abstract: A processing unit, method, and medium for decompressing or generating textures within a graphics processing unit (GPU). The textures are compressed with a variable-rate compression scheme such as JPEG. The compressed textures are retrieved from system memory and transferred to local cache memory on the GPU without first being decompressed. A table is utilized by the cache to locate individual blocks within the compressed texture. A decompressing shader processor receives compressed blocks and then performs on-the-fly decompression of the blocks. The decompressed blocks are then processed as usual by a texture consuming shader processor of the GPU.

公开(公告)号：US12079919B2

公开(公告)日：2024-09-03

申请号：US17489718

申请日：2021-09-29

Applicant: Advanced Micro Devices, Inc.

Inventor： David Ronald Oldcorn ,  Matthäus G. Chajdas ,  Michael A. Kern

IPC: G06T15/06 ,  G06T11/20

CPC classification number: G06T15/06 ,  G06T11/20 ,  G06T2210/12

Abstract: Described herein is a technique for performing operations for a bounding volume hierarchy. The techniques include: for a bounding box with quantized orientation, the bounding box being part of a bounding volume hierarchy, rotating a ray according to the quantized orientation to generate a rotated ray; performing an intersection test against the bounding box with the rotated ray; and according to the results of the intersection test, continuing traversal of the bounding volume hierarchy.

公开(公告)号：US20240289151A1

公开(公告)日：2024-08-29

申请号：US18113912

申请日：2023-02-24

Applicant: ATI Technologies ULC ,  Advanced Micro Devices, Inc.

Inventor： Philip Ng ,  Nippon Raval ,  Jeremy W. Powell ,  Donald Matthews, JR. ,  David Kaplan

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06F2009/45587

Abstract: A processor configured to execute one or more virtual machines (VMs) includes an input-output memory management unit (IOMMU) configured to handle memory-mapped input-output (MMIO) requests and direct memory access (DMA) requests from a processor core of the processor or one or more input/output (I/O) devices. In response to receiving an MMIO or DMA request, the IOMMU is configured to determine a VM associated with the request. The IOMMU then checks a security indicator field of an address space identifier (ASID) mask table to determine if the VM was previously the target of an attack by a malicious entity. In response to the VM previously being a target of an attack, the IOMMU denies the received MMIO or DMA request.

公开(公告)号：US12072754B2

公开(公告)日：2024-08-27

申请号：US17485199

申请日：2021-09-24

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexander J. Branover ,  Christopher T. Weaver ,  Indrani Paul ,  Benjamin Tsien ,  Mihir Shaileshbhai Doctor ,  Stephen V. Kosonocky ,  John P. Petry ,  Thomas J. Gibney

IPC: G06F1/00 ,  G06F1/3296

CPC classification number: G06F1/3296

Abstract: A method and apparatus for managing a controller includes indicating, by a processor of a first device, to the controller of a second device to enter a second power state from a first power state. The controller of the second device responds to the processor of the first device with a confirmation. The processor of the first device transmits a signal to the controller of the second device to enter the second power state. Upon receiving a wake event, the controller of the second device exits the second device from the second power state to the first power state.

公开(公告)号：US12068215B2

公开(公告)日：2024-08-20

申请号：US18152022

申请日：2023-01-09

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： David A. Roberts ,  Greg Sadowski ,  Steven Raasch

IPC: H01L23/34 ,  G05B15/02 ,  G06F1/20 ,  H01L25/065

CPC classification number: H01L23/34 ,  G05B15/02 ,  G06F1/20 ,  H01L25/0657 ,  H01L2225/06589

Abstract: Exemplary embodiments provide thermal wear spreading among a plurality of thermal die regions in an integrated circuit or among dies by using die region wear-out data that represents a cumulative amount of time each of a number of thermal die regions in one or more dies has spent at a particular temperature level. In one example, die region wear-out data is stored in persistent memory and is accrued over a life of each respective thermal region so that a long term monitoring of temperature levels in the various die regions is used to spread thermal wear among the thermal die regions. In one example, spreading thermal wear is done by controlling task execution such as thread execution among one or more processing cores, dies and/or data access operations for a memory.

公开(公告)号：US12067749B2

公开(公告)日：2024-08-20

申请号：US17562777

申请日：2021-12-27

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： Anthony Chan ,  Christopher J. Brennan ,  Angel Serah

IPC: G06T7/90 ,  G01J3/46 ,  G06T9/00

CPC classification number: G06T7/90 ,  G01J3/463 ,  G06T9/00 ,  G01J2003/467 ,  G06T2207/10024

Abstract: Systems, apparatuses, and methods for performing color channel correlation detection are disclosed. A compression engine performs a color channel transform on an original set of pixel data to generate a channel transformed set of pixel data. An analysis unit determines whether to compress the channel transformed set of pixel data or the original set of pixel data based on performing a comparison of the two sets of pixel data. In one scenario, the channel transformed set of pixel data is generated by calculating the difference between a first pixel component and a second pixel component for each pixel of the set of pixel data. The difference is then compared to the original first pixel component for each pixel. If the difference is less than or equal to the original for a threshold number of pixels, then the analysis unit decides to apply the color channel transform prior to compression.

公开(公告)号：US12067649B2

公开(公告)日：2024-08-20

申请号：US17362908

申请日：2021-06-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Christopher J. Brennan

IPC: G06T11/00 ,  G06T1/20

CPC classification number: G06T11/001 ,  G06T1/20

Abstract: A disclosed technique includes determining a plurality of per-pixel variable rate shading rates for a plurality of fragments; determining a coarse variable shading rate for a coarse variable rate shading area based on the plurality of per-pixel variable rate shading rates; and shading one or more fragments based on the plurality of fragments and based on the coarse variable shading rate.