Method of forming haze-free BST films
    102.
    发明授权
    Method of forming haze-free BST films 失效
    形成无雾BST膜的方法

    公开(公告)号:US06319764B1

    公开(公告)日:2001-11-20

    申请号:US09382753

    申请日:1999-08-25

    IPC分类号: H01L218242

    摘要: Described herein is a method for producing a haze-free (Ba, Sr)TiO3 (BST) film, and devices incorporating the same. In one embodiment, the BST film is made haze-free by depositing the film with a substantially uniform desired crystal orientation, for example, (100), preferably by forming the film by metal-organic chemical vapor deposition at a temperature greater than about 580° C. at a rate of less than about 80 Å/min, to result in a film having about 50 to 53.5 atomic percent titanium. In another embodiment, where the BST film serves as a capacitor for a DRAM memory cell, a desired {100} orientation is induced by depositing the bottom electrode over a nucleation layer of NiO, which gives the bottom electrode a preferential {100} orientation. BST is then grown over the {100} oriented bottom electrode also with a {100} orientation. A nucleation layer of materials such as Ti, Nb and Mn can also be provided over the bottom electrode and beneath the BST film to induce smooth, haze-free BST growth. Haze-free BST film can also be favored by forming the bottom electrode at high temperatures close to those used for BST deposition, and without a vacuum break between the bottom electrode and BST deposition.

    摘要翻译: 本文描述了一种生产无雾(Ba,Sr)TiO 3(BST)膜的方法,以及包含它的装置。 在一个实施方案中,BST膜通过以基本上均匀的所需晶体取向沉积薄膜而形成为无雾状,例如(100),优选通过金属 - 有机化学气相沉积在大于约580℃的温度下形成薄膜 ℃,以小于约/分钟的速率,得到具有约50至53.5原子百分数的钛的膜。 在另一个实施例中,其中BST膜用作DRAM存储单元的电容器,通过将底部电极沉积在NiO的成核层上来诱导所需的{100}取向,这使得底部电极具有优先{100}取向。 然后,BST也以{100}取向生长在{100}取向的底部电极上。 还可以在底部电极和BST膜下方提供诸如Ti,Nb和Mn的材料的成核层,以引起平滑无雾的BST生长。 通过在接近用于BST沉积的高温下形成底部电极,并且在底部电极和BST沉积之间没有真空断裂,也可以使无色BST膜更有利。

    Anti-reflective coatings and methods for forming and using same
    103.
    发明授权
    Anti-reflective coatings and methods for forming and using same 有权
    抗反射涂层及其形成和使用方法

    公开(公告)号:US06294459B1

    公开(公告)日:2001-09-25

    申请号:US09146293

    申请日:1998-09-03

    IPC分类号: H01L214763

    摘要: An anti-reflective coating material layer is provided that has a relatively high etch rate such that it can be removed simultaneously with the cleaning of a defined opening in a relatively short period of time without affecting the critical dimensions of the opening. A method of forming such a layer includes providing a substrate assembly surface and using a gas mixture of at least a silicon containing precursor, a nitrogen containing precursor, and an oxygen containing precursor. The layer is formed at a temperature in the range of about 50° C. to about 600° C. Generally, the anti-reflective coating material layer deposited is SixOyNz:H, where x is in the range of about 0.39 to about 0.65, y is in the range of about 0.02 to about 0.56, z is in the range of about 0.05 to about 0.33, and where the atomic percentage of hydrogen in the inorganic anti-reflective coating material layer is in the range of about 10 atomic percent to about 40 atomic percent. The total SiH4 flow is generally in the range of about 80 sccm to about 400 sccm. The gas mixture may include SiH4 and N2O, where the ratio of SiH4:N2O is in the range of about 0.25 to 0.60. The inorganic anti-reflective coating material layer may be used for defining contact openings, openings for forming capacitor structures, or any other openings in oxide layers.

    摘要翻译: 提供了具有相对高的蚀刻速率的抗反射涂层材料层,使得其可以在相对较短的时间段内清洁所定义的开口同时移除,而不影响开口的临界尺寸。 形成这种层的方法包括提供衬底组合表面并使用至少含硅前体,含氮前体和含氧前体的气体混合物。 该层在约50℃至约600℃的温度范围内形成。通常,沉积的抗反射涂层材料为SixOyNz:H,其中x在约0.39至约0.65的范围内, y在约0.02至约0.56的范围内,z在约0.05至约0.33的范围内,并且其中无机抗反射涂层材料层中的氢的原子百分比在约10原子%至 约40原子%。 总SiH 4流通常在约80sccm至约400sccm的范围内。 气体混合物可以包括SiH 4和N 2 O,其中SiH 4 :N 2 O的比例在约0.25至0.60的范围内。 无机抗反射涂层材料层可用于限定接触开口,用于形成电容器结构的开口或氧化物层中的任何其它开口。

    Vertical memory cell for high-density memory

    公开(公告)号:US10333064B2

    公开(公告)日:2019-06-25

    申请号:US13086321

    申请日:2011-04-13

    IPC分类号: H01L47/00 H01L45/00 H01L27/24

    摘要: This disclosure provides embodiments for the formation of vertical memory cell structures that may be implemented in RRAM devices. In one embodiment, memory cell area may be increased by varying word line height and/or word line interface surface characteristics to ensure the creation of a grain boundary that is suitable for formation of conductive pathways through an active layer of an RRAM memory cell. This may maintain continuum behavior while reducing random cell-to-cell variability that is often encountered at nanoscopic scales. In another embodiment, such vertical memory cell structures may be formed in multiple-tiers to define a three-dimensional RRAM memory array. Further embodiments also provide a spacer pitch-doubled RRAM memory array that integrates vertical memory cell structures.

    Non-volatile resistive oxide memory cells and methods of forming non-volatile resistive oxide memory cells
    105.
    发明授权
    Non-volatile resistive oxide memory cells and methods of forming non-volatile resistive oxide memory cells 有权
    非挥发性电阻氧化物存储单元和形成非易失性电阻氧化物存储单元的方法

    公开(公告)号:US09577186B2

    公开(公告)日:2017-02-21

    申请号:US13488190

    申请日:2012-06-04

    IPC分类号: H01L21/00 H01L45/00 H01L27/24

    摘要: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The first conductive electrode has an elevationally outermost surface and opposing laterally outermost edges at the elevationally outermost surface in one planar cross section. Multi-resistive state metal oxide-comprising material is formed over the first conductive electrode. Conductive material is deposited over the multi-resistive state metal oxide-comprising material. A second conductive electrode of the memory cell which comprises the conductive material is received over the multi-resistive state metal oxide-comprising material. The forming thereof includes etching through the conductive material to form opposing laterally outermost conductive edges of said conductive material in the one planar cross section at the conclusion of said etching which are received laterally outward of the opposing laterally outermost edges of the first conductive electrode in the one planar cross section.

    摘要翻译: 形成非易失性电阻氧化物存储单元的方法包括:形成存储单元的第一导电电极作为衬底的一部分。 第一导电电极在一个平面横截面中具有垂直最外表面和在最外表面处的相对的横向最外边缘。 在第一导电电极上形成包含多电阻态金属氧化物的材料。 导电材料沉积在多电阻状态的含金属氧化物的材料上。 包含导电材料的存储单元的第二导电电极被接收在多电阻状态的含金属氧化物的材料上。 其形成包括通过导电材料的蚀刻,以在所述蚀刻结束时在一个平面截面中形成所述导电材料的相对的横向最外面的导电边缘,其在第一导电电极的相对的横向最外边缘的横向外侧接收 一个平面截面。

    Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling
    108.
    发明授权
    Spin torque transfer cell structure utilizing field-induced antiferromagnetic or ferromagnetic coupling 有权
    使用场诱导反铁磁或铁磁耦合的自旋转矩传递单元结构

    公开(公告)号:US08665640B2

    公开(公告)日:2014-03-04

    申请号:US13544670

    申请日:2012-07-09

    申请人: Jun Liu Gurtej Sandhu

    发明人: Jun Liu Gurtej Sandhu

    IPC分类号: G11C11/00

    摘要: A magnetic memory cell including a soft magnetic layer and a coupling layer, and methods of operating the memory cell are provided. The memory cell includes a stack with a free ferromagnetic layer and a pinned ferromagnetic layer, and a soft magnetic layer and a coupling layer may also be formed as layers in the stack. The coupling layer may cause antiferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction antiparallel to the magnetization of the soft magnetic layer, or the coupling layer may cause ferromagnetic coupling to induce the free ferromagnetic layer to be magnetized in a direction parallel to the magnetization of the soft magnetic layer. The coupling layer, through a coupling effect, reduces the critical switching current of the memory cell.

    摘要翻译: 提供了包括软磁性层和耦合层的磁存储单元,以及操作存储单元的方法。 存储单元包括具有自由铁磁层和钉扎铁磁层的堆叠,并且软磁层和耦合层也可以形成为堆叠中的层。 耦合层可以引起反铁磁耦合以使自由铁磁层在与软磁层的磁化方向反平行的方向上被磁化,或者耦合层可以引起铁磁性耦合,以使得自由铁磁层在平行方向上被磁化 到软磁层的磁化。 耦合层通过耦合效应降低了存储单元的关键开关电流。

    SPIN CURRENT GENERATOR FOR STT-MRAM OR OTHER SPINTRONICS APPLICATIONS
    109.
    发明申请
    SPIN CURRENT GENERATOR FOR STT-MRAM OR OTHER SPINTRONICS APPLICATIONS 有权
    用于STT-MRAM或其他SPINTRONICS应用的旋转电流发生器

    公开(公告)号:US20130272061A1

    公开(公告)日:2013-10-17

    申请号:US13911917

    申请日:2013-06-06

    申请人: Jun Liu Gurtej Sandhu

    发明人: Jun Liu Gurtej Sandhu

    IPC分类号: G11C11/16

    摘要: Spin current generators and systems and methods for employing spin current generators. A spin current generator may be configured to generate a spin current polarized in one direction, or a spin current selectively polarized in two directions. The spin current generator may by employed in spintronics applications, wherein a spin current is desired.

    摘要翻译: 自旋电流发生器和采用自旋电流发生器的系统和方法。 自旋电流发生器可以被配置为产生在一个方向上偏振的自旋电流,或者在两个方向上选择性地偏振的自旋电流。 自旋电流发生器可用于自旋电子学应用中,其中期望自旋电流。