公开(公告)号：US10084062B2

公开(公告)日：2018-09-25

申请号：US15657401

申请日：2017-07-24

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ning Ge ,  Leong Yap Chia ,  Pin Chin Lee ,  Jose Jehrome Rando

IPC: H01L29/66 ,  H01L21/332

CPC classification number: H01L29/66575 ,  H01L21/28035 ,  H01L21/28123 ,  H01L21/823437 ,  H01L21/823481 ,  H01L29/0847 ,  H01L29/66659 ,  H01L29/78 ,  H05K2203/013

Abstract: In some examples, a semiconductor device includes a substrate, a first doped region formed in the substrate, a second doped region around and spaced apart from the first doped region, and a channel between the first and second doped regions and formed using a gate ring on the substrate as a mask. A gate is formed over only a portion of the channel, the gate being a portion of the gate ring.

公开(公告)号：US10071552B2

公开(公告)日：2018-09-11

申请号：US15547133

申请日：2015-04-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Zhiyong Li ,  Leong Yap Chia ,  Wai Mun Wong

IPC: B41J2/14 ,  G01N27/414

CPC classification number: B41J2/14153 ,  B41J2/125 ,  G01N27/414

Abstract: In an example, a device for sensing a property of a fluid may include an ion-sensitive field effect transistor (ISFET) having a gate, a source, and a drain. The device may also include a first metal element in contact with the gate and a switching layer in contact with the first metal layer. A resistance state of the switching layer is to be modified through application of an electrical field of at least a predefined strength through the switching layer and is to be retained in the switching layer following removal of the electrical field. The device may also include a metal plate in contact with the switching layer, in which the metal plate is to directly contact the fluid for which the property is to be sensed.

公开(公告)号：US20180222188A1

公开(公告)日：2018-08-09

申请号：US15748831

申请日：2015-10-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ning Ge ,  Ser Chia Koh ,  Chaw Sing Ho ,  John Patrick Oliver

IPC: B41J2/14 ,  B41J2/045 ,  H05K1/16

CPC classification number: B41J2/14024 ,  B41J2/04543 ,  B41J2202/11 ,  H05K1/167 ,  H05K2203/013

Abstract: In one example, a printhead having an electrically-functional optical target. The printhead includes a substrate. An optical target having an optically-distinguishable shape and formed from at least one polysilicon strip is deposited on the substrate. An electrical connection to at least one of the polysilicon strips connect the strip into a circuit that is deposited on the substrate.

公开(公告)号：US10026476B2

公开(公告)日：2018-07-17

申请号：US15521590

申请日：2014-11-25

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Leong Yap Chia ,  Ning Ge ,  Wai Mun Wong

IPC: G11C13/00 ,  B41J2/045

Abstract: A circuit comprising an input, a ground, a first switch, a second switch and a bi-polar memristor, wherein the first switch is a first transistor and a gate of the first transistor is connected to a line to instruct setting of the bi-polar memristor, and the second switch is a second transistor and a gate of the second transistor is connected to a line to instruct re-setting of the bi-polar memristor.

公开(公告)号：US10014055B2

公开(公告)日：2018-07-03

申请号：US15327927

申请日：2014-07-30

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Boon Bing Ng ,  Thida Ma Win ,  Ning Ge ,  Jose Jehrome Rando

IPC: G11C16/06 ,  B41J2/045 ,  G11C19/28 ,  B41J2/175

CPC classification number: G11C16/06 ,  B41J2/17546 ,  G11C8/12 ,  G11C16/08 ,  G11C19/00 ,  G11C19/28

Abstract: A split memory bank may comprise a number of memory matrices forming a memory bank and a shift register in which the shift register physically separates the matrices. An integrated circuit may comprise a number of shift registers and a plurality of memory matrices forming a memory bank in which the matrices are spatially separated by the shift register. An integrated printhead may comprise a number of memory banks each comprising a plurality of memory matrices and a number of shift registers in which each shift register spatially separates a number of the matrices.

公开(公告)号：US20180147839A1

公开(公告)日：2018-05-31

申请号：US15877971

申请日：2018-01-23

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Leong Yap Chia ,  Wai Mun Wong

IPC: B41J2/045 ,  G11C16/32 ,  G11C16/08

CPC classification number: B41J2/04541 ,  B41J2/04543 ,  B41J2/0458 ,  B41J2/04581 ,  B41J2/04586 ,  G11C16/08 ,  G11C16/32

Abstract: Addressing an EPROM on a printhead is described. In an example, a printhead includes an electronically programmable read-only memory (EPROM) having a plurality of cells arranged in rows and columns, each of the cells having a addressing port, a row select port, and a column select port. A conductor is coupled to the addressing portion of each of the plurality of cells. A column shift register is coupled to the column select ports of the plurality of cells, the column shift register having a register location for each column of the plurality of cells and having an input to receive a first input signal. A row shift register is coupled to row select ports of the plurality of cells, the row shift register having a register location for each row of the plurality of cells and having an input to receive a second input signal.

公开(公告)号：US09950520B2

公开(公告)日：2018-04-24

申请号：US15516648

申请日：2014-10-28

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Leong Yap Chia ,  Pin Chin Lee

IPC: B41J2/175 ,  B41J2/045 ,  B41J2/135

CPC classification number: B41J2/04581 ,  B41J2/04541 ,  B41J2/0458 ,  B41J2/135 ,  B41J2/1753 ,  B41J2/17546 ,  B41J2202/17

Abstract: A printhead having a number of single-dimensional memristor banks is described. The printhead includes a number of nozzles to deposit an amount of fluid onto a print medium. Each nozzle includes a firing chamber to hold the amount of fluid, an opening to dispense the amount of fluid onto the print medium, and an ejector to eject the amount of fluid through the opening. The printhead also includes a number of single-dimensional memristor banks. Each memristor bank includes a number of memristors arranged in a single dimension and a number of serially-connected de-multiplexers to selectively activate a target memristor of the memristor bank. The number of serially-connected de-multiplexers is equal to the number of memristors and an output of at least one de-multiplexer is an input into a subsequent de-multiplexer.

公开(公告)号：US09919517B2

公开(公告)日：2018-03-20

申请号：US15111247

申请日：2014-01-17

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Leong Yap Chia ,  Wai Mun Wong

IPC: G11C16/08 ,  B41J2/045 ,  G11C16/32

CPC classification number: B41J2/04541 ,  B41J2/04543 ,  B41J2/0458 ,  B41J2/04581 ,  B41J2/04586 ,  G11C16/08 ,  G11C16/32

Abstract: Addressing an EPROM on a printhead is described. In an example, a printhead includes an electronically programmable read-only memory (EPROM) having a plurality of cells arranged in rows and columns, each of the cells having a addressing port, a row select port, and a column select port. A conductor is coupled to the addressing portion of each of the plurality of cells. A column shift register is coupled to the column select ports of the plurality of cells, the column shift register having a register location for each column of the plurality of cells and having an input to receive a first input signal. A row shift register is coupled to row select ports of the plurality of cells, the row shift register having a register location for each row of the plurality of cells and having an input to receive a second input signal.

公开(公告)号：US09889659B2

公开(公告)日：2018-02-13

申请号：US15328277

申请日：2014-07-29

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Jianhua Yang ,  Minxian Zhang

IPC: B41J2/045 ,  B41J2/14 ,  B41J2/16 ,  H01L45/00 ,  H01L27/24

CPC classification number: B41J2/1433 ,  B41J2/04541 ,  B41J2/04581 ,  B41J2/14129 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1642 ,  B41J2/1646 ,  B41J2/17546 ,  B41J2202/13 ,  B41J2202/18 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/1233

Abstract: In an example, a printhead includes a memristor, in which the memristor may include a first electrode, a second electrode positioned in a crossed relationship with the first electrode to form a junction, and a switching element positioned at the junction between the first electrode and the second electrode, in which the switching layer includes a via formed in the switching element to reduce an area of the switching element.

公开(公告)号：US09870822B2

公开(公告)日：2018-01-16

申请号：US15102718

申请日：2013-12-18

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Jianhua Yang ,  Zhiyong Li

IPC: G11C13/00 ,  H01L45/00 ,  H01L27/24 ,  G11C11/56

CPC classification number: G11C13/0069 ,  G11C7/04 ,  G11C11/56 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C2013/008 ,  G11C2213/32 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1286 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: A non-volatile memory element with thermal-assisted switching control is disclosed. The non-volatile memory element is disposed on a thermal inkjet resistor. Methods for manufacturing the combination and methods of using the combination are also disclosed.