公开(公告)号：US08883027B2

公开(公告)日：2014-11-11

申请号：US12683995

申请日：2010-01-07

Applicant: Hyungsuk Alexander Yoon ,  William Thie ,  Yezdi Dordi ,  Andrew D. Bailey, III

Inventor： Hyungsuk Alexander Yoon ,  William Thie ,  Yezdi Dordi ,  Andrew D. Bailey, III

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/02 ,  H05H1/24 ,  H01L21/67 ,  H01L21/311 ,  C23C16/00

CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/67069 ,  H05H1/24 ,  H05H1/2406 ,  H05H1/48 ,  H05H2001/2418

Abstract: A method for generating plasma for removing metal oxide from a substrate is provided. The method includes providing a powered electrode assembly, which includes a powered electrode, a dielectric layer, and a wire mesh disposed between the powered electrode and the dielectric layer. The method also includes providing a grounded electrode assembly disposed opposite the powered electrode assembly to form a cavity wherein the plasma is generated. The wire mesh is shielded from the plasma by the dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the metal oxide. The method further includes introducing at least one inert gas and at least one process gas into the cavity. The method yet also includes applying an rf field to the cavity using the powered electrode to generate the plasma from the inert and the process gas.

Abstract translation: 提供了一种用于从衬底去除金属氧化物的等离子体的方法。 该方法包括提供一种动力电极组件，其包括供电电极，电介质层和布置在电源电极和电介质层之间的金属丝网。 该方法还包括提供与动力电极组件相对设置的接地电极组件，以形成其中产生等离子体的空腔。 当等离子体存在于空腔中时，金属丝网通过电介质层被屏蔽，等离子体在一端具有出口，用于提供等离子体以去除金属氧化物。 该方法还包括将至少一种惰性气体和至少一种工艺气体引入空腔中。 该方法还包括使用动力电极将空穴场施加到空腔，以从惰性气体和处理气体产生等离子体。

公开(公告)号：US20130126475A1

公开(公告)日：2013-05-23

申请号：US13301725

申请日：2011-11-21

Applicant: Rajinder Dhindsa ,  Alexei Marakhtanov ,  Gerardo Delgadino ,  Eric Hudson ,  Bi Ming Yen ,  Andrew D. Bailey, III

Inventor： Rajinder Dhindsa ,  Alexei Marakhtanov ,  Gerardo Delgadino ,  Eric Hudson ,  Bi Ming Yen ,  Andrew D. Bailey, III

IPC: C23F1/00 ,  H05H1/24 ,  C23F1/08

CPC classification number: H01J37/32091 ,  H01J37/32165

Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.

Abstract translation: 提供了半导体制造方法，系统和计算机程序。 一个晶片处理装置包括：顶部电极; 底部电极; 第一射频（RF）电源; 第二RF电源; 第三射频电源; 第四RF电源; 和开关。 第一，第二和第三电源耦合到底部电极。 此外，开关可操作为处于第一位置或第二位置之一，其中第一位置使顶部电极连接到地，而第二位置使顶部电极连接到第四RF电源 。

公开(公告)号：US08308896B2

公开(公告)日：2012-11-13

申请号：US13053037

申请日：2011-03-21

Applicant: Yunsang Kim ,  Andrew D. Bailey, III

Inventor： Yunsang Kim ,  Andrew D. Bailey, III

IPC: C23F1/00 ,  H01L21/306 ,  B44C1/22 ,  C03C25/68 ,  C03C15/00

CPC classification number: H01J37/32532 ,  H01J37/32357 ,  H01J37/3244 ,  H01J37/32862

Abstract: A method of cleaning a bevel edge of a substrate in an etch processing chamber is provided. The method includes placing a substrate on a substrate support in a processing chamber. The method also includes flowing a cleaning gas through a gas feed located near a center of a gas distribution plate, disposed at a distance from the substrate support. The method further includes generating a cleaning plasma near a bevel edge of the substrate to clean the bevel edge by powering a bottom edge electrode or a top edge electrode with a RF power source and grounding the edge electrode that is not powered by the RF power source, the bottom edge electrode surrounds the substrate support and the top edge electrode surrounds the gas distribution plate.

Abstract translation: 提供了一种在蚀刻处理室中清洁衬底的斜边缘的方法。 该方法包括将衬底放置在处理室中的衬底支撑件上。 该方法还包括使清洁气体流过设置在与衬底支撑件相距一定距离处的气体分配板的中心附近的气体进料。 该方法还包括在衬底的斜边缘附近产生清洁等离子体，以通过用RF电源为底部边缘电极或顶部边缘电极供电来清洁斜面边缘，并且将不由RF电源供电的边缘电极接地 底部边缘电极围绕基板支撑件，并且顶部边缘电极围绕气体分配板。

公开(公告)号：US08268116B2

公开(公告)日：2012-09-18

申请号：US11818621

申请日：2007-06-14

Applicant: Andrew D. Bailey, III ,  Yunsang Kim

Inventor： Andrew D. Bailey, III ,  Yunsang Kim

IPC: C23F1/00 ,  H01L21/306 ,  C23C16/00

CPC classification number: H01J37/32385 ,  H01J37/321 ,  H01J37/32366 ,  H01J37/32706 ,  H01L21/02087 ,  H01L21/67069 ,  H01L21/6715

Abstract: Apparatus and methods protect a central process exclusion region of a substrate during processing of an edge environ region of process performance. Removal of undesired materials is only from the edge environ region while the central device region is protected from damage. Field strengths are configured to protect the central region from charged particles from plasma in a process chamber and to foster removal of the undesired materials from only the edge environ region. A magnetic field is configured with a peak value adjacent to a border between the central and edge environ regions. A strong field gradient extends from the peak radially away from the border and away from the central region to repel the charged particles from the central region. The strength and location of the field are adjustable by axial relative movement of magnet sections, and flux plates are configured to redirect the field for desired protection.

Abstract translation: 装置和方法在处理工艺性能的边缘环境区域期间保护衬底的中心过程排除区域。 去除不需要的材料仅来自边缘环境区域，而中央设备区域被保护免受损坏。 场强被配置为保护中心区域免受处理室中的带电粒子等离子体的影响，并且仅促进从边缘环境区域移除不需要的材料。 磁场配置有与中央和边缘环境区域之间的边界相邻的峰值。 强场梯度从径向远离边界并远离中心区域从峰值延伸，以将带电粒子从中心区域排斥。 磁场的强度和位置可以通过磁体部分的轴向相对运动来调节，并且磁通板被配置为重定向磁场以达到期望的保护。

公开(公告)号：US08252140B2

公开(公告)日：2012-08-28

申请号：US13084849

申请日：2011-04-12

Applicant: Gregory S. Sexton ,  Andrew D. Bailey, III ,  Andras Kuthi

Inventor： Gregory S. Sexton ,  Andrew D. Bailey, III ,  Andras Kuthi

IPC: C23F1/00 ,  H01L21/306

CPC classification number: H01L21/02087 ,  B08B7/0035 ,  H01J37/32091 ,  H01J37/32174 ,  H01J37/32541 ,  H01L21/67069

Abstract: The embodiments provide structures and mechanisms for removal of etch byproducts, dielectric films and metal films on and near the substrate bevel edge, and chamber interior to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. In one example, a chamber for wafer bevel edge cleaning is provided. The chamber includes a bottom electrode having a bottom electrode surface for supporting the wafer when present. Also included is a top edge electrode surrounding an insulating plate. The insulator plate is opposing the bottom electrode. The top edge electrode is electrically grounded and has a down-facing L shape. Further included in the chamber is a bottom edge electrode that is electrically grounded and spaced apart from the bottom electrode. The bottom edge electrode is disposed to encircle the bottom electrode. The bottom edge electrode is oriented to oppose the down-facing L shape of the top edge electrode.

Abstract translation: 这些实施例提供用于去除基板斜边缘上和附近的蚀刻副产物，电介质膜和金属膜的结构和机构，以及室内，以避免聚合物副产物和沉积膜的积聚并提高工艺产率。 在一个示例中，提供了用于晶片斜面边缘清洁的室。 该室包括底部电极，其具有用于在存在时支撑晶片的底部电极表面。 还包括围绕绝缘板的顶边电极。 绝缘板与底部电极相对。 顶边电极电接地并具有向下的L形状。 还包括在腔室中的底边电极是电接地的并且与底部电极间隔开。 下边缘电极被设置成环绕底部电极。 底部边缘电极被定向成与顶部边缘电极的向下的L形相对。

公开(公告)号：US08236188B2

公开(公告)日：2012-08-07

申请号：US12756086

申请日：2010-04-07

Applicant: Bing Ji ,  Kenji Takeshita ,  Andrew D. Bailey, III ,  Eric A. Hudson ,  Maryam Moravej ,  Stephen M. Sirard ,  Jungmin Ko ,  Daniel Le ,  Robert C. Hefty ,  Yu Cheng ,  Gerardo A. Delgadino ,  Bi-Ming Yen

Inventor： Bing Ji ,  Kenji Takeshita ,  Andrew D. Bailey, III ,  Eric A. Hudson ,  Maryam Moravej ,  Stephen M. Sirard ,  Jungmin Ko ,  Daniel Le ,  Robert C. Hefty ,  Yu Cheng ,  Gerardo A. Delgadino ,  Bi-Ming Yen

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/31138

Abstract: A method for etching features in a low-k dielectric layer disposed below an organic mask is provided by an embodiment of the invention. Features are etched into the low-k dielectric layer through the organic mask. A fluorocarbon layer is deposited on the low-k dielectric layer. The fluorocarbon layer is cured. The organic mask is stripped.

Abstract translation: 通过本发明的实施例提供了一种用于蚀刻位于有机掩模下方的低k电介质层中的特征的方法。 通过有机掩模将特征蚀刻到低k电介质层中。 在低k电介质层上沉积氟碳层。 氟碳层被固化。 剥去有机面膜。

公开(公告)号：US08225683B2

公开(公告)日：2012-07-24

申请号：US12233501

申请日：2008-09-18

Applicant: Andrew D. Bailey, III

Inventor： Andrew D. Bailey, III

IPC: G01B21/20 ,  H01L21/66

CPC classification number: H01L22/12 ,  G01B21/08 ,  G01B21/20 ,  G01B21/30 ,  H01L22/20

Abstract: An arrangement for quantifying a wafer bow. The arrangement is positioned within a plasma processing system is provided. The arrangement includes a support mechanism for holding a wafer. The arrangement also includes a first set of sensors, which is configured to collect a first set of measurement data for a plurality of data points on the wafer. The first set of measurement data indicates a minimum gap between the first set of sensors and the wafer. The first set of sensors is positioned in a first location, which is outside of a set of process modules of the plasma processing system.

Abstract translation: 用于量化晶片弓的布置。 该装置位于等离子体处理系统内。 该装置包括用于保持晶片的支撑机构。 该布置还包括第一组传感器，其被配置为收集晶片上的多个数据点的第一组测量数据。 第一组测量数据表示第一组传感器和晶片之间的最小间隙。 第一组传感器位于第一位置，其位于等离子体处理系统的一组处理模块之外。

公开(公告)号：US08135485B2

公开(公告)日：2012-03-13

申请号：US12237155

申请日：2008-09-24

Applicant: Jack Chen ,  Andrew D. Bailey, III ,  Ben Mooring ,  Stephen J Cain

Inventor： Jack Chen ,  Andrew D. Bailey, III ,  Ben Mooring ,  Stephen J Cain

IPC: H01L21/00 ,  G06F19/00 ,  G05B19/418 ,  G05B15/00 ,  B44C1/22 ,  G06K9/00

CPC classification number: H01L21/681 ,  H01L21/68

Abstract: A method for aligning a substrate to a process center of a support mechanism is provided. The method includes determining substrate thickness after substrate processing at a plurality of orientations and at a plurality of radial distances from a geometric center of the substrate. The method also includes deriving a set of process rate values from substrate thickness and process duration. The method further includes creating for a process rate an off-centered plot, which represents a substantially concentric circle whose points are a circumference of the off-centered plot having substantially the first process rate. The method yet also includes applying a curve-fitting equation to the off-centered plot to determine a set of parameters. The method yet further includes teaching a set of robot arms the set of parameters, thereby enabling the set of robot arms to align another substrate that is supported by the support mechanism with the process center.

Abstract translation: 提供了一种将基板对准支撑机构的处理中心的方法。 该方法包括在基板处理之后确定基板厚度，该基板在多个取向并且距离基板的几何中心的多个径向距离处。 该方法还包括从衬底厚度和工艺持续时间导出一组工艺速率值。 该方法还包括为处理速率创建偏心图，其表示基本上同心的圆，其点是具有基本上第一处理速率的偏心图的圆周。 该方法还包括将曲线拟合方程应用于偏心图以确定一组参数。 该方法还包括向一组机器人手臂提供一组参数，从而使得该组机器人臂将由支撑机构支撑的另一个基板与处理中心对准。

公开(公告)号：US20110165779A1

公开(公告)日：2011-07-07

申请号：US13047735

申请日：2011-03-14

Applicant: Gregory S. Sexton ,  Andrew D. Bailey, III ,  Alan M. Schoepp ,  John D. Boniface

Inventor： Gregory S. Sexton ,  Andrew D. Bailey, III ,  Alan M. Schoepp ,  John D. Boniface

IPC: H01L21/465

CPC classification number: H01L21/67069 ,  H01J37/32568

Abstract: Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.

Abstract translation: 提供了用于使上电极相对于下电极定向的方法。 下电极被配置为在处理室中具有期望的现有取向，以在处理室中限定用于处理晶片的有源和非活性工艺区。 该方法包括用参考表面配置每个电极，其中下电极参考表面处于所需的现有取向，并且上电极参考表面被平行于下电极参考表面定向。 然后，暂时保持与上部电极基准面平行的上部电极基准面，并将该上部电极固定在与上述电极基准面平行的驱动器上。 还公开和示出了其它方法构造。

公开(公告)号：US20100181025A1

公开(公告)日：2010-07-22

申请号：US12750612

申请日：2010-03-30

Applicant: Hyungsuk Alexander Yoon ,  John Boyd ,  Andras Kuthi ,  Andrew D. Bailey, III

Inventor： Hyungsuk Alexander Yoon ,  John Boyd ,  Andras Kuthi ,  Andrew D. Bailey, III

IPC: C23F1/08

CPC classification number: H01L21/02087 ,  B08B7/0035

Abstract: An apparatus generating a plasma for removing fluorinated polymer from a substrate is provided. The apparatus includes a powered electrode assembly, which includes a powered electrode, a first dielectric layer, and a first wire mesh disposed between the powered electrode and the first dielectric layer. The apparatus also includes a grounded electrode assembly disposed opposite the powered electrode assembly so as to form a cavity wherein the plasma is generated. The first wire mesh is shielded from the plasma by the first dielectric layer when the plasma is present in the cavity, which has an outlet at one end for providing the plasma to remove the fluorinated polymer.

Abstract translation: 提供一种从衬底生成用于除去氟化聚合物的等离子体的装置。 所述装置包括电源电极组件，其包括供电电极，第一电介质层和布置在所述电源电极和所述第一电介质层之间的第一电线网。 该装置还包括与动力电极组件相对设置的接地电极组件，以便形成其中产生等离子体的空腔。 当空腔中存在等离子体时，第一电介质层通过第一电介质层屏蔽第一丝网，其在一端具有出口以提供等离子体以除去氟化聚合物。