公开(公告)号：US20120202306A1

公开(公告)日：2012-08-09

申请号：US13506295

申请日：2012-04-10

Applicant: Chang Youn KIM ,  Shiro SAKAI ,  Hwa Mok KIM ,  Joon Hee LEE ,  Soo Young MOON ,  Kyoung Wan KIM

Inventor： Chang Youn KIM ,  Shiro SAKAI ,  Hwa Mok KIM ,  Joon Hee LEE ,  Soo Young MOON ,  Kyoung Wan KIM

IPC: H01L33/32

CPC classification number: H01L33/007 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02639 ,  H01L33/005 ,  H01L33/0079

Abstract: The present invention provides a method of fabricating a semiconductor substrate and a method of fabricating a light emitting device. The method includes forming a first semiconductor layer on a substrate, forming a metallic material layer on the first semiconductor layer, forming a second semiconductor layer on the first semiconductor layer and the metallic material layer, wherein a void is formed in a first portion of the first semiconductor layer under the metallic material layer during formation of the second semiconductor layer, and separating the substrate from the second semiconductor layer by etching at least a second portion of the first semiconductor layer using a chemical solution.

公开(公告)号：US08130783B2

公开(公告)日：2012-03-06

申请号：US11648625

申请日：2007-01-03

Applicant: Ju-han Lee ,  Joon-hee Lee ,  Jun-hae Choi ,  Hyun-ah Sung ,  In-hwan Kim ,  Seung-gi Chang

Inventor： Ju-han Lee ,  Joon-hee Lee ,  Jun-hae Choi ,  Hyun-ah Sung ,  In-hwan Kim ,  Seung-gi Chang

IPC: H04L12/413

CPC classification number: H04W84/20 ,  H04B3/54 ,  H04B2203/5408 ,  H04B2203/542 ,  H04W72/0406 ,  H04W84/18

Abstract: A method of joining a cell by using a proxy coordinator. The method of joining a cell by using a proxy coordinator includes requesting a second device to operate as a proxy coordinator from a first device positioned out of a beacon frame reachable area of the cell, transmitting a time period to operate as the proxy coordinator allocated by a coordinator of the cell, informing the first device that the second device can operate as the proxy coordinator, transmitting a cell join request to the proxy coordinator from the first device through the second device, and transmitting a beacon frame including time allocation information from the coordinator to the first device through the second device.

Abstract translation: 一种通过使用代理协调器加入单元的方法。 通过使用代理协调器加入小区的方法包括请求第二设备从位于小区的信标帧可达区域之外的第一设备作为代理协调器操作，发送时间段以作为由 通知所述第一设备所述第二设备可以作为所述代理协调器操作，通过所述第二设备从所述第一设备向所述代理协调器发送小区连接请求，以及从所述第二设备发送包括时间分配信息的信标帧 协调器通过第二个设备到第一个设备。

公开(公告)号：US20110297972A1

公开(公告)日：2011-12-08

申请号：US13202210

申请日：2010-03-24

Applicant: Won Cheol Seo ,  Dae Sung Kal ,  Joon Hee Lee ,  Chang Youn Kim

Inventor： Won Cheol Seo ,  Dae Sung Kal ,  Joon Hee Lee ,  Chang Youn Kim

IPC: H01L33/62

CPC classification number: H01L25/0753 ,  H01L27/153 ,  H01L33/0079 ,  H01L33/38 ,  H01L33/405 ,  H01L33/641 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2933/0016

Abstract: A light emitting device having a plurality of light emitting cells is disclosed. The light emitting device comprises a substrate; a plurality of light emitting cells positioned on the substrate to be spaced apart from one another, each of the light emitting cells comprising a p-type lower semiconductor layer, an active layer and an n-type upper semiconductor layer; p-electrodes positioned to be spaced apart from one another between the substrate and the light emitting cells, the respective p-electrodes being electrically connected to the corresponding lower semiconductor layers, each of the p-electrodes having an extension extending toward adjacent one of the light emitting cells; n-electrodes disposed on upper surfaces of the respective light emitting cells, wherein a contact surface of each of the n-electrodes electrically contacting with each light emitting cell exists both sides of any straight line that bisects the light emitting cell across the center of the upper surface of the light emitting cell; a side insulating layer for covering sides of the light emitting cells; and wires for connecting the p-electrodes and the n-electrodes, the wires being spaced apart from the sides of the light emitting cells by the side insulating layer.

Abstract translation: 公开了一种具有多个发光单元的发光器件。 发光器件包括衬底; 位于所述基板上的多个发光单元彼此间隔开，每个所述发光单元包括p型下半导体层，有源层和n型上半导体层; p电极被定位成在衬底和发光单元之间彼此间隔开，各个p电极电连接到相应的下半导体层，每个p电极具有延伸到相邻的一个 发光单元; 设置在各个发光单元的上表面上的n电极，其中与每个发光单元电接触的每个n电极的接触表面存在于将所述发光单元平分在所述发光单元的中心的任何直线的两侧 发光单元的上表面; 用于覆盖所述发光单元的侧面的侧绝缘层; 以及用于连接p电极和n电极的电线，电线通过侧绝缘层与发光单元的侧面间隔开。

公开(公告)号：US20110227114A1

公开(公告)日：2011-09-22

申请号：US13077371

申请日：2011-03-31

Applicant: Chang Youn KIM ,  Joon Hee LEE ,  Jong Kyun YOU ,  Hong Chol LIM

Inventor： Chang Youn KIM ,  Joon Hee LEE ,  Jong Kyun YOU ,  Hong Chol LIM

IPC: H01L33/00

CPC classification number: H01L33/22 ,  H01L33/20 ,  H01L33/382

Abstract: Provided is a high-efficiency light emitting diode (LED) that includes: a support substrate; a semiconductor stack positioned on the support substrate, the semiconductor stack including a p-type compound semiconductor layer, an active layer, and an n-type compound semiconductor layer; a first electrode positioned between the support substrate and the semiconductor stack and in ohmic contact with the semiconductor stack; a first bonding pad positioned on a portion of the first electrode that is exposed outside of the semiconductor stack; and a second electrode positioned on the semiconductor stack. Protrusions are formed on exposed surfaces of the semiconductor stack. In addition, the second electrode may be positioned between the first electrode and the support substrate and contacted with the n-type compound semiconductor layer through openings of the semiconductor stack.

公开(公告)号：US07972693B2

公开(公告)日：2011-07-05

申请号：US11816785

申请日：2005-05-27

Applicant: Joon-Hee Lee

Inventor： Joon-Hee Lee

IPC: B32B15/00 ,  C08G73/14 ,  C08F126/06

CPC classification number: H01B3/305 ,  C08K5/34926 ,  C08L79/08 ,  C08L2205/02 ,  C09D179/08 ,  H01B3/306 ,  Y10T428/2933 ,  C08L2666/20

Abstract: Disclosed are enamel varnish compositions for an enamel wire and an enamel wire using the same. The present invention relates to enamel varnish compositions for an enamel wire in which a polymeric resin component is included in an organic solvent, wherein the polymeric resin component includes a first polyamideimide resin, presented in the Chemistry FIG. 1; and a second resin having polyamideimide in which a triazine ring is introduced into a major chain. The enamel wire, in which such a coating pigment composition is applied to the innermost insulated coating layer contacted with the conducting wire, shows the increased adhesivity of the insulated coating layer to the conducting wire without forming an additional bonding layer, as well as the excellent physical properties such as the wear resistance and flexibility, etc.

Abstract translation: 公开了用于搪瓷丝的搪瓷清漆组合物和使用其的搪瓷丝。 本发明涉及搪瓷丝的搪瓷清漆组合物，其中在有机溶剂中包含聚合物树脂组分，其中聚合物树脂组分包括第一聚酰胺酰亚胺树脂，呈现在化学图 1; 和具有聚酰胺酰亚胺的第二树脂，其中三嗪环被引入主链。 将这种涂料颜料组合物施加到与导线接触的最内层绝缘涂层的漆包线显示出绝缘涂层对导线的粘附性增加而不形成另外的粘合层，以及优异的 物理性能如耐磨性和柔韧性等。

公开(公告)号：US07782693B2

公开(公告)日：2010-08-24

申请号：US12007518

申请日：2008-01-11

Applicant: Byoung-Sul Kim ,  Joon-Hee Lee ,  Jae-in Song ,  Jun-Ho Jo

Inventor： Byoung-Sul Kim ,  Joon-Hee Lee ,  Jae-in Song ,  Jun-Ho Jo

IPC: G11C7/00

CPC classification number: G11C11/4094 ,  G11C7/1042 ,  G11C11/4076

Abstract: A semiconductor memory device and an operation control method thereof are provided. The method may comprise executing a control such that a precharge operating mode and an active operating mode may be successively performed in response to one pre-active command, thereby reducing the current consumption and loading of the system, and thus, enhancing system performance.

Abstract translation: 提供半导体存储器件及其操作控制方法。 该方法可以包括执行控制，使得响应于一个预先活动命令可以连续执行预充电操作模式和主动操作模式，从而减少系统的电流消耗和负载，从而提高系统性能。

公开(公告)号：US07719375B2

公开(公告)日：2010-05-18

申请号：US11745654

申请日：2007-05-08

Applicant: Seong-Hwan Cho ,  Kyung-Lok Kim ,  Jung-Hyup Lee ,  Joon-Hee Lee

Inventor： Seong-Hwan Cho ,  Kyung-Lok Kim ,  Jung-Hyup Lee ,  Joon-Hee Lee

IPC: H03B1/00

CPC classification number: H04B1/46

Abstract: A PLL includes an open-loop automatic frequency calibration circuit. The open-loop automatic frequency calibration circuit includes a frequency detector, first and second sinks, a comparator and a bank selector. The frequency detector generates an up-signal and a down-signal responding to a frequency difference between a first phase difference signal having a phase difference from a reference oscillation signal and the second phase difference signal having a phase difference from a frequency division oscillation signal. The first and second sinks discharge the first and second capacitors respectively responding to the up-signal and the down-signal. The comparator compares voltages of the first and second capacitors. The bank selector selects a bank according to binary search, selects an optimum bank among two banks lastly searched, and outputs a bank selection signal. The voltage-controlled oscillation changes frequency features thereof in response to the bank selection signal.

Abstract translation: PLL包括开环自动频率校准电路。 开环自动频率校准电路包括频率检测器，第一和第二吸收器，比较器和组选择器。 频率检测器响应于具有与参考振荡信号的相位差的第一相位差信号与具有与分频振荡信号的相位差的第二相位差信号之间的频率差产生上升信号和下降信号。 第一和第二吸收器分别响应于上信号和下信号而放电第一和第二电容器。 比较器比较第一和第二电容器的电压。 银行选择器根据二进制搜索选择银行，最后在两个银行中选择一个最优库，并输出存款单元选择信号。 电压控制振荡响应于存储体选择信号改变其频率特征。

公开(公告)号：US07589022B2

公开(公告)日：2009-09-15

申请号：US11585713

申请日：2006-10-24

Applicant: Hyun-Suk Kim ,  Won-Jin Kim ,  Joon-Hee Lee ,  Yong-Seok Kim ,  Jong-Won Kim

Inventor： Hyun-Suk Kim ,  Won-Jin Kim ,  Joon-Hee Lee ,  Yong-Seok Kim ,  Jong-Won Kim

IPC: H01L21/461

CPC classification number: H01L21/3212 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11531

Abstract: There is provided a method of chemical mechanical polishing (CMP) and a method of fabricating a semiconductor device using the same. The method includes forming a layer to be polished on a semiconductor substrate including a normally polished region and a dished region, and forming a dishing (i.e., over-polishing)-preventing layer on the layer to be polished in the region where dishing may occur. Then, the layer to be polished is polished while dishing thereof is prevented using the dishing-preventing layer. Accordingly, the dishing-preventing layer is formed in the region where the dishing (i.e., over-polishing) may occur, so that the dishing is prevented from occurring in a region where pattern density is low and a pattern size is large in the process of CMP.

Abstract translation: 提供了化学机械抛光（CMP）的方法和使用其的半导体器件的制造方法。 该方法包括在包括正常抛光区域和碟形区域的半导体衬底上形成待抛光层，并且在可能发生凹陷的区域中在待抛光层上形成凹陷（即，过抛光） - 预防层 。 然后，使用防止凹陷层防止要抛光的层，同时使其抛光。 因此，在可能发生凹陷（即，过度抛光）的区域中形成凹陷防止层，从而防止在图案密度低的区域和图案尺寸在该过程中发生凹陷 的CMP。

公开(公告)号：US20090037784A1

公开(公告)日：2009-02-05

申请号：US12219815

申请日：2008-07-29

Applicant: Byoung-Sul Kim ,  Joon-Hee Lee ,  Kwan-Yong Jin ,  Seung-Hee Lee

Inventor： Byoung-Sul Kim ,  Joon-Hee Lee ,  Kwan-Yong Jin ,  Seung-Hee Lee

IPC: G11C29/08 ,  G06F11/00

CPC classification number: G11C29/28 ,  G11C29/40 ,  G11C2029/4002

Abstract: A semiconductor memory device having a mount test circuit and a mount test method thereof are provided. The test circuit for use in a semiconductor memory device including a plurality of memory blocks may include a comparison unit for comparing test data of at least two memory blocks selected from the plurality of memory blocks, deciding whether or not the test data of the selected memory blocks are identical, and outputting a pass signal or fail signal as a flag signal; and an output selection unit for selecting any one of the selected memory blocks as an output memory block, and changing the output memory block whenever the fail signal is generated from the comparison unit, thus forming it as a data output path, which may lessen error occurrence.

Abstract translation: 提供一种具有安装测试电路及其安装测试方法的半导体存储器件。 用于包括多个存储块的半导体存储器件的测试电路可以包括：比较单元，用于比较从多个存储块中选出的至少两个存储块的测试数据，判断所选择的存储器的测试数据 块相同，并输出通过信号或失败信号作为标志信号; 以及输出选择单元，用于选择所选择的存储器块中的任何一个作为输出存储器块，并且每当从比较单元产生故障信号时改变输出存储器块，从而将其形成为可以减少误差的数据输出路径 发生。

公开(公告)号：US20080176072A1

公开(公告)日：2008-07-24

申请号：US11816785

申请日：2005-05-27

Applicant: Joon-Hee Lee

Inventor： Joon-Hee Lee

IPC: B32B27/34 ,  C08L79/08

CPC classification number: H01B3/305 ,  C08K5/34926 ,  C08L79/08 ,  C08L2205/02 ,  C09D179/08 ,  H01B3/306 ,  Y10T428/2933 ,  C08L2666/20

Abstract: Disclosed are enamel varnish compositions for an enamel wire and an enamel wire using the same. The present invention relates to enamel varnish compositions for an enamel wire in which a polymeric resin component is included in an organic solvent, wherein the polymeric resin component includes a first polyamideimide resin, presented in the Chemistry FIG. 1; and a second resin having polyamideimide in which a triazine ring is introduced into a major chain. The enamel wire, in which such a coating pigment composition is applied to the innermost insulated coating layer contacted with the conducting wire, shows the increased adhesivity of the insulated coating layer to the conducting wire without forming an additional bonding layer, as well as the excellent physical properties such as the wear resistance and flexibility, etc.

Abstract translation: 公开了用于搪瓷丝的搪瓷清漆组合物和使用其的搪瓷丝。 本发明涉及搪瓷丝的搪瓷清漆组合物，其中在有机溶剂中包含聚合物树脂组分，其中聚合物树脂组分包括第一聚酰胺酰亚胺树脂，呈现在化学图 1; 和具有聚酰胺酰亚胺的第二树脂，其中三嗪环被引入主链。 将这种涂料颜料组合物施加到与导线接触的最内层绝缘涂层的漆包线显示出绝缘涂层对导线的粘附性增加而不形成另外的粘合层，以及优异的 物理性能如耐磨性和柔韧性等。