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    PREPARATION METHODS OF 6-SUBSTITUTED AMINO-3-CYANOQUINOLINE COMPOUNDS AND THE INTERMEDIATES THEREOF
    111.
    发明申请
    PREPARATION METHODS OF 6-SUBSTITUTED AMINO-3-CYANOQUINOLINE COMPOUNDS AND THE INTERMEDIATES THEREOF 有权
    6-取代的氨基-3-氰基喹啉化合物的制备方法及其中间体

    公开(公告)号：US20110263860A1

    公开(公告)日：2011-10-27

    申请号：US13125721

    申请日：2009-10-23

    Applicant: Yongjun Mao ,  Jianfeng Li ,  Jin Zheng ,  Zheng Liu ,  Kai Xie ,  Haihong Li ,  Jing Shi ,  Ye Li ,  Jingshan Shen

    Inventor： Yongjun Mao ,  Jianfeng Li ,  Jin Zheng ,  Zheng Liu ,  Kai Xie ,  Haihong Li ,  Jing Shi ,  Ye Li ,  Jingshan Shen

    IPC: C07D215/20 ,  C07D215/38 ,  C07C69/78

    CPC classification number: C07C229/64 ,  C07C237/30 ,  C07C255/30 ,  C07D215/56

    Abstract: The present invention relates to a method for preparing 6-substituted amino-3-cyanoquinoline compounds (compound A for short) and the intermediates thereof, more particularly, to a compound of the following formula (I), the preparation method thereof, the intermediates thereof and use thereof for preparing the compound A. The compound of the formula (I) is cyclized in the presence of an alkali to give a compound of formula A, wherein W is OH; or the compound of the formula (I) is cyclized in the presence of an alkali, and then chlorinated to give a compound of the formula A, wherein W is Cl. Compared with the known methods in the literature, the method for preparing the compound A from the compound of formula (I) according to the present invention can avoid using high-temperature condition and high boiling point solvents, and is safe and environment-friendly, mild in reaction condition, easy in operation with a high yield and high product purity.

    Abstract translation: 本发明涉及一种制备6-取代氨基-3-氰基喹啉化合物（简称为化合物A）的方法及其中间体，更具体地涉及下式（I）的化合物，其制备方法，中间体 及其用于制备化合物A的用途。式（I）化合物在碱存在下环化，得到式A化合物，其中W为OH; 或式（I）化合物在碱的存在下环化，然后氯化，得到式A化合物，其中W为Cl。 与文献中已知的方法相比，本发明的式（I）化合物制备化合物A的方法可以避免使用高温条件和高沸点溶剂，且安全环保， 反应条件温和，易于操作，产率高，产品纯度高。

    SEMICONDUCTOR NANOSTRUCTURE
    112.
    发明申请
    SEMICONDUCTOR NANOSTRUCTURE 有权
    半导体纳米结构

    公开(公告)号：US20110127639A1

    公开(公告)日：2011-06-02

    申请号：US12842195

    申请日：2010-07-23

    Applicant: JIAN WU ,  ZHENG LIU ,  WEN-HUI DUAN ,  BING-LIN GU

    Inventor： JIAN WU ,  ZHENG LIU ,  WEN-HUI DUAN ,  BING-LIN GU

    IPC: H01L29/04 ,  H01L29/12 ,  H01L29/06

    CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/045 ,  H01L29/15

    Abstract: The present disclosure relates to a semiconductor nanostructure. The semiconductor nanostructure includes a substrate and at least one ridge. The substrate includes a first crystal plane and a second crystal plane perpendicular to the first crystal plane. The at least one ridge extends from the first crystal plane along a crystallographic orientation of the second crystal plane. A width of cross section at a position of half the height of the at least one ridge is less than 17 nm. The semiconductor nanostructure is a patterned structure which can lead to generate a quantum confinement effect, such that the impurity scattering phenomenon is reduced.

    Abstract translation: 本发明涉及半导体纳米结构。 半导体纳米结构包括基底和至少一个脊。 衬底包括垂直于第一晶体平面的第一晶体平面和第二晶体面。 所述至少一个脊从所述第一晶体平面沿着所述第二晶体平面的晶体取向延伸。 在至少一个脊的高度的一半位置处的横截面宽度小于17nm。 半导体纳米结构是可以导致产生量子限制效应的图案化结构，使得杂质散射现象减少。

    Process for Manufacturing Super-high-count Ramie Fabric and the Fabric
    113.
    发明申请
    Process for Manufacturing Super-high-count Ramie Fabric and the Fabric 有权
    超高苎麻织物和织物制造工艺

    公开(公告)号：US20100300576A1

    公开(公告)日：2010-12-02

    申请号：US12601921

    申请日：2008-06-18

    Applicant: Zheng Liu ,  Hao Geng ,  Xiangqi Zhou ,  Liming Liu

    Inventor： Zheng Liu ,  Hao Geng ,  Xiangqi Zhou ,  Liming Liu

    IPC: D03C13/00

    CPC classification number: D03D15/06 ,  D02G3/04 ,  D02G3/406 ,  D10B2201/01 ,  D10B2201/08

    Abstract: The present invention relates to a process for manufacturing a ramie fabric and the fabric. The process comprising the following step: blend spinning a high-count ramie fiber such as a ramie fiber of 2500Nm or higher with a water-soluble fiber as carrier to form a yarn; sizing the yarn at a low temperature; weaving the yarn to form a gray fabric; then removing the water-soluble fiber from the gray fabric by deweighting the gray fabric during a finishing process after printing and dyeing to obtain a super-high-count ramie fabric with a ramie yarn fineness of 160Nm or higher.

    Abstract translation: 本发明涉及苎麻织物和织物的制造方法。 该方法包括以下步骤：将高倍数苎麻纤维如2500Nm以上的苎麻纤维与水溶性纤维作为载体混纺以形成纱线; 在低温下定型纱线; 编织纱线形成灰色织物; 然后通过在印染后的整理过程中使灰色织物减重，从灰色织物中除去水溶性纤维，得到苎麻纱线细度为160Nm以上的超高苎麻织物。

    Sample hold circuit for use in time-interleaved A/D converter apparatus including paralleled low-speed pipeline A/D converters
    114.
    发明授权
    Sample hold circuit for use in time-interleaved A/D converter apparatus including paralleled low-speed pipeline A/D converters 有权
    采样保持电路，用于并行低速流水线A / D转换器的时间交织A / D转换装置

    公开(公告)号：US07834786B2

    公开(公告)日：2010-11-16

    申请号：US12436289

    申请日：2009-05-06

    Applicant: Shoji Kawahito ,  Zheng Liu ,  Yasuhide Shimizu ,  Kuniyuki Tani ,  Akira Kurauchi ,  Koji Sushihara ,  Koichiro Mashiko

    Inventor： Shoji Kawahito ,  Zheng Liu ,  Yasuhide Shimizu ,  Kuniyuki Tani ,  Akira Kurauchi ,  Koji Sushihara ,  Koichiro Mashiko

    IPC: H03M1/10

    CPC classification number: H03M1/1009 ,  G11C27/026 ,  H03M1/1215

    Abstract: A sample hold circuit is provided for use in a time-interleaved A/D converter apparatus including a plurality of low-speed pipeline A/D converters which are parallelized. The sample hold circuit includes a sampling capacitor and a sample hold amplifier, and operates to sample and hold an input signal by using a switched capacitor. An adder circuit of the sample hold circuit adds a ramp calibration signal to the input signal, by inputting the ramp calibration signal generated to have a frequency identical to that of a sampling clock signal and a predetermined slope based on the sampling clock signal, into a sample hold amplifier via a calibration capacitor having a capacitance smaller than that of the sampling capacitor.

    Abstract translation: 提供了一种采样保持电路，用于并行化的多个低速流水线A / D转换器的时间交错A / D转换装置。 采样保持电路包括采样电容器和采样保持放大器，并且通过使用开关电容器来操作来采样和保持输入信号。 采样保持电路的加法电路通过将产生的具有与采样时钟信号和采样时钟信号的频率相同的频率的斜坡校准信号和基于采样时钟信号的预定斜率输入到输入信号中，将斜坡校准信号添加到 采样保持放大器经由具有小于采样电容器的电容的校准电容器。

    SPHERE DECODING METHOD APPLIED TO MULTI-INPUT MULTI-OUTPUT (MIMO) CHANNEL
    119.
    发明申请
    SPHERE DECODING METHOD APPLIED TO MULTI-INPUT MULTI-OUTPUT (MIMO) CHANNEL 有权
    适用于多输入多输出（MIMO）通道的球面解码方法

    公开(公告)号：US20100074352A1

    公开(公告)日：2010-03-25

    申请号：US12562422

    申请日：2009-09-18

    Applicant: Yen-Chih Chen ,  Tsung-Chun Cheng ,  Der-Zheng Liu

    Inventor： Yen-Chih Chen ,  Tsung-Chun Cheng ,  Der-Zheng Liu

    IPC: H04K1/10

    CPC classification number: H04L25/0246 ,  H04L27/34

    Abstract: A sphere decoding method applied to a MIMO channel is provided. Multiple constellation points of an nth detection layer corresponding to a MIMO channel matrix are enumerated based on an enumeration rule, and at least one nth sub-set of the nth detection layer is defined. K constellation points are obtained from each of the at least one nth sub-set as preferred points, and Kn preferred points are selected from all the K preferred points of the at least one nth sub-set. K1 preferred points are transferred to a second detection layer from a first detection layer. K(T−1) preferred points are transferred to a Tth detection layer from a (T−1)th detection layer. An optimal solution is determined according to Kn preferred points of the nth detection layer. K and at least one of K1 to KT are determined by the The characteristic of the MIMO channel matrix.

    Abstract translation: 提供了应用于MIMO信道的球体解码方法。 对应于MIMO信道矩阵的第n个检测层的多个星座点基于枚举规则进行枚举，并且定义第n个检测层的至少第n个子集。 从所述至少第n个子集中的每一个获得K个星座点作为优选点，并且从所述至少第n个子集的所有K个优选点中选择Kn个优选点。 K1优选点从第一检测层转移到第二检测层。 K（T-1）优选点从第（T-1）检测层转移到第T检测层。 根据第n个检测层的Kn优选点确定最佳解。 K，并且由K1到KT中的至少一个由MIMO信道矩阵的特性来确定。

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