Method of inspecting a semiconductor device and an apparatus thereof
    111.
    发明授权
    Method of inspecting a semiconductor device and an apparatus thereof 有权
    检查半导体器件的方法及其装置

    公开(公告)号:US06888959B2

    公开(公告)日:2005-05-03

    申请号:US09791682

    申请日:2001-02-26

    摘要: In order to inspect a substance to be detected such as a foreign substance in accordance with the condition of the surface of a sample to be inspected such as a semiconductor substrate manufactured in various manufacturing processes under a suitable inspection condition, this method includes the steps of: inspecting a substance to be detected on a sample to be inspected under a plurality inspection conditions, which are previously set, as a single unit to detect at least the data of a detected substance for each of the plurality of inspection conditions; checking the data of the detected substance for the respective inspection conditions against each other to make check data; analyzing the detected substance based on the check data of the detected substance to classify the detected substance; adding the data of classified detected substance to the coordinate data of the detected substance for the respective inspection conditions to make data relating to the classified detected substance for the respective inspection conditions; and selecting a suitable inspection condition based on the data relating to the classified detected substance for the respective inspection conditions.

    摘要翻译: 为了在适当的检查条件下,根据在各种制造工序中制造的半导体衬底等被检测样品的表面状况,检查异物等异物,该方法包括以下步骤: 在预先设定的多个检查条件下检查待检测样品上检测到的物质作为单个单元,至少检测多个检查条件中检测物质的数据; 检查相应检查条件的检测物质的数据,以进行检查数据; 基于检测到的物质的检查数据分析检测到的物质以对检测到的物质进行分类; 将各种检测条件的检测物质的坐标数据相加,对各检查条件进行分类检测物质的数据的添加; 以及基于与各检查条件的分类检测物质有关的数据来选择合适的检查条件。

    Workflow server and workflow system control method
    112.
    发明授权
    Workflow server and workflow system control method 失效
    工作流服务器和工作流系统控制方法

    公开(公告)号:US06859823B1

    公开(公告)日:2005-02-22

    申请号:US09514945

    申请日:2000-02-28

    IPC分类号: G06Q10/00 G06F15/16

    CPC分类号: G06Q10/10

    摘要: A workflow server is provided with, in association with a user management table 100 for managing work items for each user, a list 130 of substitute users for indicating a substitute user for each work or process and a list 140 of users in charge who designates the user as a substitute. When a client terminal user selects a specific user among the users in charge on the list 130, the workflow server checks the power of substitute by referring to the list 140 of substitute users for the selected user, thereby to allow the client terminal user to process a predesignated unprocessed work item instead of the selected user in charge.

    摘要翻译: 与用于管理每个用户的工作项的用户管理表100相关联地提供工作流服务器,用于指示每个工作或处理的替代用户的代表用户列表130以及指定用户的用户的列表140 用户作为替代品。 当客户终端用户在列表130中负责的用户中选择特定用户时,工作流服务器通过参照所选择的用户的替代用户的列表140来检查替代的权力,从而允许客户终端用户处理 预先指定的未处理的工作项目,而不是所选的用户。

    Method and its apparatus for inspecting particles or defects of a semiconductor device
    113.
    发明申请
    Method and its apparatus for inspecting particles or defects of a semiconductor device 有权
    用于检查半导体器件的颗粒或缺陷的方法及其装置

    公开(公告)号:US20050024633A1

    公开(公告)日:2005-02-03

    申请号:US10933977

    申请日:2004-09-03

    IPC分类号: G01N21/88 G01N21/94

    摘要: Conventionally, a particle/defect inspection apparatus outputs a total number of detected particles/defects as the result of detection. For taking countermeasures to failures in manufacturing processes, the particles/defects detected by the inspection apparatus are analyzed. Since the inspection apparatus outputs a large number of detected particles/defects, an immense time is required for analyzing the detected particles/defects, resulting in a delay in taking countermeasures to a failure in the manufacturing processes. In the present invention, an apparatus for optically inspecting particles or defects relates a particle or defect size to a cause of failure in an inspection result. A data processing circuit points out a cause of failure from the statistics on the inspection result, and displays information on the inspection result. A failure analysis is conducted by setting a threshold for identifying a failure in each of regions on a semiconductor device or the like to statistically evaluate detected particles.

    摘要翻译: 通常,作为检测结果,粒子/缺陷检查装置输出检测出的粒子/缺陷的总数。 对于制造过程中的故障采取对策,分析检查装置检测到的颗粒/缺陷。 由于检查装置输出大量检测到的粒子/缺陷,所以需要巨大的时间来分析检测到的粒子/缺陷,从而导致制造过程中的失败的对策的延迟。 在本发明中,用于光学检查颗粒或缺陷的装置在检查结果中将颗粒或缺陷尺寸与故障原因相关联。 数据处理电路从检查结果统计中指出故障原因,并显示检查结果信息。 通过设定用于识别半导体装置等上的各区域的故障的阈值来进行故障分析,以统计学评价检测出的粒子。

    Screw member with elastically deformable features
    117.
    发明授权
    Screw member with elastically deformable features 失效
    具有弹性变形特征的螺杆构件

    公开(公告)号:US06514025B2

    公开(公告)日:2003-02-04

    申请号:US09862073

    申请日:2001-05-21

    申请人: Tetsuya Watanabe

    发明人: Tetsuya Watanabe

    IPC分类号: F16B3930

    摘要: A screw member having a loosening prevention function is provided to improve a fastening power and a relative strength in thread connection. With an arrangement to provide a first crest portion and a second crest portion at the opposite ends of a thread point, a first screw member generates a loosening prevention effect due to elastic deformation of the first crest portion and the second crest portion, with the entire thread flank from the base portion to the point brought into contact with a second screw member on the both surfaces of the thread flanks. With this arrangement, a strong fastening power can be obtained, and a clamping force applied to the thread is distributed over the thread, thereby enabling improvement in the relative strength in thread connection.

    摘要翻译: 提供具有松动防止功能的螺纹构件以提高螺纹连接中的紧固力和相对强度。 通过在螺纹点的相对端设置第一顶部部分和第二顶部部分的布置,第一螺纹部件由于第一顶部部分和第二顶部部分的弹性变形而产生松动防止效果,整个 螺纹齿从基部到与螺纹面的两个表面上的第二螺纹构件接触的点。 通过这种布置,可以获得强大的紧固力,并且施加到螺纹的夹紧力分布在螺纹上,从而可以提高螺纹连接中的相对强度。

    Semiconductor memory device permitting time required for writing data to be reduced
    118.
    发明授权
    Semiconductor memory device permitting time required for writing data to be reduced 失效
    允许减少写入数据所需的时间的半导体存储器件

    公开(公告)号:US06201758B1

    公开(公告)日:2001-03-13

    申请号:US09499044

    申请日:2000-02-07

    IPC分类号: G11C800

    CPC分类号: G11C11/419

    摘要: A precharge circuit and a bit line load circuit are provided to a read bit line pair. The bit line load circuit continuously supplies a prescribed current to a read bit line. When data is written to one of memory cells selected in common by one read word line, the level of each read bit line will not be lowered to the level of the ground potential by the bit line load circuit if a read word line is activated, and therefore the loads of both discharge and charge operations by transistors in the memory cell are reduced.

    摘要翻译: 向读位线对提供预充电电路和位线负载电路。 位线负载电路将规定的电流连续地提供给读位线。 当将数据写入一个读取字线共同选择的存储器单元之一时,如果读取的字线被激活,则每个读取位线的电平将不会被位线负载电路降低到地电位的电平, 因此减小存储单元中的晶体管的放电和充电操作的负载。

    Cache memory with plurality of congruence sets and sense amplifiers
shared among the congruence sets
    119.
    发明授权
    Cache memory with plurality of congruence sets and sense amplifiers shared among the congruence sets 失效
    具有多个等同集和高斯集合之间共享的读出放大器的高速缓冲存储器

    公开(公告)号:US5522056A

    公开(公告)日:1996-05-28

    申请号:US101800

    申请日:1993-08-03

    IPC分类号: G06F12/08 G06F12/00

    CPC分类号: G06F12/0864

    摘要: A cache memory with a data memory divided into a plurality of word arrays, each of which is selectable by a word select indicator. Each word array is further divided into a plurality of bit arrays, each of which correspond to a bit of a word, and include congruence set memories for each congruence set. A bit array is connected to a sense amplifier via a congruence set selector, thereby one set of congruence set memories of the word arrays in the data memory is selected, and one congruence set memory is selected from each of the bit arrays by a congruence set selector to be connected with a sense amplifier, so that only one sense amplifier has to be provided for each bit in each word in an entry of the data memory, thus eliminating the need to increase the number sense amplifiers as the number of congruence sets increases. Furthermore, as only the sense amplifier associated with the selected word array is operational, current consumption is reduced.

    摘要翻译: 一种具有数据存储器的高速缓存存储器,被划分为多个字阵列,每个字阵列可由字选择指示器选择。 每个字阵列进一步被划分成多个位阵列,每个位阵列对应一个字的位,并且包括每个一致集合的一致集合存储器。 一个位阵列通过一个一致的集合选择器连接到一个读出放大器,从而选择数据存储器中的字阵列的一组一致的集合存储器,并且通过一致集合从每个位阵列中选择一个一致集合存储器 选择器与读出放大器连接,从而必须为数据存储器的条目中的每个字中的每个位提供一个读出放大器,从而不再需要增加数量检测放大器,因为一致性集合的数量增加 。 此外,由于只有与所选字阵列相关联的读出放大器可操作,所以消耗电流。

    Operand address calculation in a pipeline processor by decomposing the
operand specifier into sequential step codes
    120.
    发明授权
    Operand address calculation in a pipeline processor by decomposing the operand specifier into sequential step codes 失效
    通过将操作指定器分解为顺序步骤代码,在管道处理器中进行操作地址计算

    公开(公告)号:US5129068A

    公开(公告)日:1992-07-07

    申请号:US313650

    申请日:1989-02-21

    摘要: A pipeline data processor includes an instruction fetch unit, an instruction decoding unit, an address calculation unit, an operand fetch unit and an instruction operation execution unit. After an instruction, or a part of an instruction, is sent from the instruction fetch unit to the decoding unit, the decoding unit decodes at least a portion of the instruction. For some instructions, the decoding unit outputs two or more step codes to achieve processing of a single operand address. In one embodiment, the operand specifier of the instruction includes a base value and at least one address extension field. The decoding unit outputs a first step code based on the base value and, subsequently, a second step code based on the address extension field. In another embodiment, an operand specifier can include up to an arbitrary number of address extension fields. The decoding unit outputs a step code corresponding to the base value of the address and another step code for each of the plurality of address extension fields. The address calculation unit sequentially receives the plurality of step codes which relate to a single operand and, when address calculation of the operand is completed, sends the result as a fuuther step code to the operand fetch unit.