公开(公告)号：US12164368B2

公开(公告)日：2024-12-10

申请号：US18068152

申请日：2022-12-19

Applicant: Micron Technology, Inc.

Inventor： Melissa I. Uribe ,  Aaron P. Boehm

IPC: G06F11/07

Abstract: Methods, systems, and devices for error detection signaling are described. In some examples, a memory device may include circuitry to detect one or more error conditions. As the memory device is operated, it may store or output a value (e.g., a high value, a “1”) indicating the absence of an error condition. Upon the occurrence of an error condition, the memory device may either store or output a value (e.g., a low value, a “0”), which may allow for the error to be corrected or mitigated. Because storing or driving the value signifying the error condition may require a driver of the memory device to be coupled with a power supply, storing or outputting the value signifying an absence of an error condition (e.g., unless a normal or valid condition is detected) may mitigate errors that would otherwise render a safety mechanism of the memory device ineffective.

公开(公告)号：US20240220354A1

公开(公告)日：2024-07-04

申请号：US18435710

申请日：2024-02-07

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/07 ,  G06F11/10

CPC classification number: G06F11/0793 ,  G06F11/073 ,  G06F11/1048

Abstract: Methods, systems, and devices for coordinated error protection are described. A set of data and an indication of whether a first management procedure performed by a memory device on the set of data detected one or more errors in the set of data may be received at a host device. At the host device, a second error management procedure may be performed on the set of data received from the memory device. Based on the received indication and the second error management procedure, multiple bits indicating whether one or more errors associated with the set of data were detected at the memory device, the host device, or both may be generated. The set of data may be validated or discarded based on the multiple bits.

公开(公告)号：US11960360B1

公开(公告)日：2024-04-16

申请号：US17934452

申请日：2022-09-22

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/10

CPC classification number: G06F11/1068 ,  G06F11/0772 ,  G06F11/0793

Abstract: Methods, systems, and devices for redundancy-based error detection in a memory device are described. A memory device may read multiple copies of a codeword from memory and generate for each codeword copy an error detection bit that indicates whether the memory device detected an error in that codeword. Additionally, the memory device may compare the codeword copies and generate one or more match bits that indicate whether corresponding portions of the codewords match. Using a combination of the error detection bits and the match bits, the memory device may determine the error status of each codeword.

公开(公告)号：US11947806B2

公开(公告)日：2024-04-02

申请号：US17505028

申请日：2021-10-19

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm ,  Scott D. Van De Graaff ,  Todd J. Plum ,  Mark D. Ingram

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0616 ,  G06F3/0655 ,  G06F3/0679

Abstract: Methods, systems, and devices for life expectancy monitoring for memory devices are described. A memory device may monitor a parameter of a component of the memory device or the memory device overall, and may determine whether the parameter satisfies a threshold. The parameter may represent or be associated with a lifetime of the component, a level of wear of the component, or an operating parameter violation of the component, or any combination thereof. The memory device may communicate, to a host device, an indication of the parameter satisfying the threshold, and the host device may use the information in the indication to adjust one or more parameters associated with operating the memory device, among other example operations.

公开(公告)号：US11899982B2

公开(公告)日：2024-02-13

申请号：US18100654

申请日：2023-01-24

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Scott E. Schaefer

IPC: G06F3/06 ,  G06F21/79 ,  G06F12/14

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0673 ,  G06F21/79 ,  G06F12/1441 ,  G06F12/1466

Abstract: Methods, systems, and devices for command block management are described. A memory device may receive a command (e.g., from a host device). The memory device may determine whether the command is defined by determining if the command is included within a set of defined commands. In the case that a received command is absent from the set of defined commands (e.g., the command is undefined), the memory device may block the command from being decoded for execution by the memory device. In some cases, the memory device may switch from a first operation mode to a second operation mode based on receiving an undefined command. The second operation mode may restrict an operation of the memory device, while the first mode may be less restrictive, in some cases. Additionally or alternatively, the memory device may indicate the undefined command to another device (e.g., the host device).

公开(公告)号：US11863620B2

公开(公告)日：2024-01-02

申请号：US17496034

申请日：2021-10-07

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: H04L67/1074 ,  H04L67/12 ,  G06F15/173 ,  H04W4/46 ,  H04W92/18 ,  H04W84/18

CPC classification number: H04L67/1078 ,  G06F15/17331 ,  H04L67/12 ,  H04W4/46 ,  H04W84/18 ,  H04W92/18

Abstract: Apparatuses, systems, and methods related to a data center using a memory pool between selected memory resources are described. A data center using a memory pool between selected memory resources enables performance of automated functions critical for prevention of damage to product, personal safety, and/or reliable operation, based on increased access to data that improves performance of a mission profile. For instance, a method described herein includes transmitting, from a processor at a first vehicle that comprises the processor and memory, a request to access a pool of memory resources configured from a plurality of vehicles each having a local processor and memory, receiving, from a second vehicle of the plurality of vehicles, an indication to access the pool of memory resources, and accessing the memory at the second vehicle using the processor at the first vehicle based on receiving the indication to access the pool of memory resources.

公开(公告)号：US20230418708A1

公开(公告)日：2023-12-28

申请号：US18213732

申请日：2023-06-23

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/10 ,  G06F11/32 ,  G06F11/30 ,  G06F11/07

CPC classification number: G06F11/1068 ,  G06F11/1044 ,  G06F11/326 ,  G06F11/3037 ,  G06F11/0772

Abstract: Methods, systems, and devices for a memory device with status feedback for error correction are described. For example, during a read operation, a memory device may perform an error correction operation on first data read from a memory array of the memory device. The error correction operation may generate second data and an indicator of a state of error corresponding to the second data. In one example, the indicator may indicate one of multiple possible states of error. In another example, the indicator may indicate a corrected error or no detectable error. The memory device may output the first or second data and the indicator of the state of error during a same burst interval. The memory device may output the data on a first channel and the indicator of the state of error on a second channel.

公开(公告)号：US11842080B2

公开(公告)日：2023-12-12

申请号：US17724216

申请日：2022-04-19

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Mark D. Ingram ,  Scott E. Schaefer ,  Scott D. Van De Graaff ,  Todd Jackson Plum

IPC: G06F12/00 ,  G06F3/06 ,  G06F11/30

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679 ,  G06F11/3058 ,  G06F11/3065

Abstract: Methods, systems, and devices for memory device health evaluation at a host device are described. The health evaluation relates to a host device that is associated with a memory device that monitors and reports health information, such as one or more parameters associated with a status of the memory device. The memory device may transmit the health information to the host device, which may perform one or more operations and may transmit the health information to a device of another entity of a system (e.g., ecosystem) including the host device. The host device may include one or more circuits for transmitting and processing the health information, such as a system health engine, a safety engine, a communication component, or a combination thereof. Based on a determination by the host device or information received from an external device, the host device may transmit a command to the memory device.

公开(公告)号：US20230334152A1

公开(公告)日：2023-10-19

申请号：US17659409

申请日：2022-04-15

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  David Hulton ,  Jeremy Chritz ,  Tamara Schmitz ,  Max S. Vohra

IPC: G06F21/55 ,  G01K3/00 ,  G01K1/02

CPC classification number: G06F21/554 ,  G01K3/005 ,  G01K1/026

Abstract: Methods, systems, and devices for temperature change measurement to detect an attack on a memory device are described. A memory device may measure a rate of change for temperature readings at a dynamic random access memory (DRAM) component of the memory device (e.g., using sensors at the DRAM component). The memory device may compare the rate of change for the temperature to a threshold, for example, using circuitry, a threshold value stored in memory, or both. If the memory device determines that the rate of change for the temperature satisfies the threshold, the memory device may disable one or more features of the memory device to protect against a potential attack. For example, an attack on the memory device may be indicated by the change in temperature readings at the DRAM component, and the memory device may perform one or more protective measures based on detecting the temperature change.

公开(公告)号：US11792624B2

公开(公告)日：2023-10-17

申请号：US17542691

申请日：2021-12-06

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: H04W4/44 ,  H04L67/12 ,  H04L67/04 ,  H04W88/08 ,  H04B1/38

CPC classification number: H04W4/44 ,  H04L67/04 ,  H04L67/12 ,  H04B1/38 ,  H04W88/08

Abstract: Apparatuses, systems, and methods related to accessing a memory resource at one or more physically remote entities are described. A system accessing a memory resource at one or more physically remote entities may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a first vehicle configured to determine that a processing capability or a memory capacity, or both, at the first vehicle is insufficient to perform a processing operation at the first vehicle, identify additional processing resources or additional memory capacity, or both, at a second vehicle that is in wireless communication with the first vehicle based at least in part on determining that the processing capability or the memory capacity, or both, at the first vehicle is insufficient, and perform the processing operation at the first vehicle using the additional processing resources or the additional memory capacity, or both.