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公开(公告)号:US11003084B2
公开(公告)日:2021-05-11
申请号:US16150789
申请日:2018-10-03
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Li-Yen Lin , Ching-Yu Chang , Chin-Hsiang Lin
IPC: G03F7/20 , G03F7/16 , H01L21/311 , H01L21/033 , G03F7/09 , G03F7/039 , H01L21/027 , G03F7/004
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The method includes exposing a portion of the resist layer by performing an exposure process. The resist layer includes a compound, and the compound has a carbon backbone, and a photoacid generator (PAG) group and/or a quencher group are bonded to the carbon backbone. The method also includes performing a baking process on the resist layer and etching a portion of the resist layer to form a patterned resist layer. The method includes patterning the material layer by using the patterned resist layer as a mask and removing the patterned resist layer.
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公开(公告)号:US11003076B2
公开(公告)日:2021-05-11
申请号:US16556435
申请日:2019-08-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yen-Hao Chen , Wei-Han Lai , Chien-Wei Wang , Chin-Hsiang Lin
IPC: G03F7/004 , G03F7/32 , C07C381/12 , G03F7/038 , G03F7/039 , G03F7/16 , G03F7/20 , G03F7/26 , G03F7/38 , G03F7/40 , H01L21/027 , C07D335/12 , C07D337/10 , C07D337/16
Abstract: Resist materials having enhanced sensitivity to radiation are disclosed herein, along with methods for lithography patterning that implement such resist materials. An exemplary resist material includes a polymer, a sensitizer, and a photo-acid generator (PAG). The sensitizer is configured to generate a secondary radiation in response to the radiation. The PAG is configured to generate acid in response to the radiation and the secondary radiation. The PAG includes a sulfonium cation having a first phenyl ring and a second phenyl ring, where the first phenyl ring is chemically bonded to the second phenyl ring.
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公开(公告)号:US20200343384A1
公开(公告)日:2020-10-29
申请号:US16927082
申请日:2020-07-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chin-Hsiang Lin , Tai-Chun Huang , Tien-I Bao
IPC: H01L29/78 , H01L29/417 , H01L21/768 , H01L21/02 , H01L21/033 , H01L21/8234 , H01L23/528 , H01L29/66
Abstract: An embodiment is a method including recessing a gate electrode over a semiconductor fin on a substrate to form a first recess from a top surface of a dielectric layer, forming a first mask in the first recess over the recessed gate electrode, recessing a first conductive contact over a source/drain region of the semiconductor fin to form a second recess from the top surface of the dielectric layer, and forming a second mask in the second recess over the recessed first conductive contact.
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公开(公告)号:US10747103B2
公开(公告)日:2020-08-18
申请号:US16228339
申请日:2018-12-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yun-Yue Lin , Hsuan-Chen Chen , Chih-Cheng Lin , Hsin-Chang Lee , Yao-Ching Ku , Wei-Jen Lo , Anthony Yen , Chin-Hsiang Lin , Mark Chien
Abstract: A method for fabricating a pellicle includes forming a first dielectric layer over a back surface of a substrate. After forming the first dielectric layer, and in some embodiments, a graphene layer is formed over a front surface of the substrate. In some examples, after forming the graphene layer, the first dielectric layer is patterned to form an opening in the first dielectric layer that exposes a portion of the back surface of the substrate. Thereafter, while using the patterned first dielectric layer as a mask, an etching process may be performed to the back surface of the substrate to form a pellicle having a pellicle membrane that includes the graphene layer.
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公开(公告)号:US10712651B2
公开(公告)日:2020-07-14
申请号:US15906586
申请日:2018-02-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hung-Wen Cho , Fu-Jye Liang , Chun-Kuang Chen , Chih-Tsung Shih , Li-Jui Chen , Po-Chung Cheng , Chin-Hsiang Lin
Abstract: A reticle used for collecting information for image-error compensation is provided. The reticle includes a first black border structure and a second black border structure formed over a substrate. The first and second black borders are concentric with a center of the substrate. The reticle further includes a first image structure and a second image structure formed over the substrate. The first and second image structures each has patterns representing features to be patterned on a semiconductor wafer. In a direction away from the center of the substrate, the second image structure, the second black border structure, the first image structure and the first black border structure are arranged in order.
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公开(公告)号:US10658184B2
公开(公告)日:2020-05-19
申请号:US15474522
申请日:2017-03-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yu-Tien Shen , Chi-Cheng Hung , Chin-Hsiang Lin , Chien-Wei Wang , Ching-Yu Chang , Chih-Yuan Ting , Kuei-Shun Chen , Ru-Gun Liu , Wei-Liang Lin , Ya Hui Chang , Yuan-Hsiang Lung , Yen-Ming Chen , Yung-Sung Yen
IPC: H01L21/265 , H01L21/311 , H01L21/033
Abstract: A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer; applying a first directional etching along a first direction to inner sidewalls of the hole; and applying a second directional etching along a second direction to the inner sidewalls of the hole, wherein the second direction is different from the first direction.
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公开(公告)号:US10517179B2
公开(公告)日:2019-12-24
申请号:US15621646
申请日:2017-06-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Siao-Shan Wang , Cheng-Han Wu , Ching-Yu Chang , Chin-Hsiang Lin
Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.
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公开(公告)号:US10515812B1
公开(公告)日:2019-12-24
申请号:US16102347
申请日:2018-08-13
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chien-Wei Wang , Joy Cheng , Ching-Yu Chang , Chin-Hsiang Lin
IPC: H01L21/00 , H01L21/288 , H01L21/3213
Abstract: A method includes forming a metal-containing material layer over a substrate, patterning the metal-containing material layer, where the patterned material layer has an average roughness, and electrochemically treating the patterned metal-containing material layer to reduce the average roughness. The treatment may be implemented by exposing the patterned metal-containing material layer to an electrically conducting solution, and applying a potential between the patterned material layer and a counter electrode exposed to the solution, such that the treating reduces the average roughness of the patterned material layer. The electrically conducting solution may include an ionic compound dissolved in water, alcohol, and/or a surfactant.
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公开(公告)号:US10401728B2
公开(公告)日:2019-09-03
申请号:US16055340
申请日:2018-08-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Yen-Hao Chen , Wei-Han Lai , Chien-Wei Wang , Chin-Hsiang Lin
IPC: G03F7/004 , G03F7/32 , C07C381/12 , G03F7/038 , G03F7/039 , G03F7/16 , G03F7/20 , G03F7/26 , G03F7/38 , G03F7/40 , H01L21/027 , C07D335/12 , C07D337/10 , C07D337/16
Abstract: Resist materials having enhanced sensitivity to radiation are disclosed herein, along with methods for lithography patterning that implement such resist materials. An exemplary resist material includes a polymer, a sensitizer, and a photo-acid generator (PAG). The sensitizer is configured to generate a secondary radiation in response to the radiation. The PAG is configured to generate acid in response to the radiation and the secondary radiation. The PAG includes a sulfonium cation having a first phenyl ring and a second phenyl ring, where the first phenyl ring is chemically bonded to the second phenyl ring.
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公开(公告)号:US20180341177A1
公开(公告)日:2018-11-29
申请号:US15694222
申请日:2017-09-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chen-Yu Liu , Wei-Han Lai , Tzu-Yang Lin , Ming-Hui Weng , Ching-Yu Chang , Chin-Hsiang Lin
IPC: G03F7/32
CPC classification number: G03F7/325 , G03F7/038 , G03F7/16 , G03F7/20 , G03F7/2004
Abstract: The present disclosure provides NTD developers and corresponding lithography techniques that can overcome resolution, line edge roughness (LER), and sensitivity (RLS) tradeoff barriers particular to extreme ultraviolet (EUV) technologies, thereby achieving high patterning fidelity for advanced technology nodes. An exemplary lithography method includes forming a negative tone resist layer over a workpiece; exposing the negative tone resist layer to EUV radiation; and removing an unexposed portion of the negative tone resist layer in a negative tone developer, thereby forming a patterned negative tone resist layer. The negative tone developer includes an organic solvent having a log P value greater than 1.82. The organic solvent is an ester acetate derivative represented by R1COOR2. R1 and R2 are hydrocarbon chains having four or less carbon atoms. In some implementations, R1, R2, or both R1 and R2 are propyl functional groups, such as n-propyl, isopropyl, or 2-methylpropyl.
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