公开(公告)号：US08624548B2

公开(公告)日：2014-01-07

申请号：US13018791

申请日：2011-02-01

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Yutaka Shionoiri

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Yutaka Shionoiri

IPC分类号： H02J7/02 ,  H02J7/00

CPC分类号： B60L11/182 ,  B60L5/005 ,  B60L11/1829 ,  B60L11/1833 ,  B60L2200/26 ,  B60L2200/32 ,  B60L2200/34 ,  H01F38/14 ,  H02J5/005 ,  H02J7/025 ,  H02J17/00 ,  H02J50/12 ,  H02J50/20 ,  H02J50/90 ,  Y02T10/7005 ,  Y02T10/7011 ,  Y02T10/7016 ,  Y02T10/7072 ,  Y02T10/92 ,  Y02T90/12 ,  Y02T90/121 ,  Y02T90/122 ,  Y02T90/125 ,  Y02T90/14

摘要： An object is to provide a moving object structure capable of reducing power loss caused when power is supplied from a power feeding device to a moving object by wireless communication. Another object is to provide a moving object structure capable of reducing the strength of a radio wave radiated to the surroundings. Before power is supplied to a moving object, a radio wave for alignment of antennas is output from a power feeding device. That is, radio waves are output from a power feeding device in two stages. In a first stage, a radio wave is output to align positions of antennas of the power feeding device and the moving object. In a second stage, a radio wave is output to supply power from the power feeding device to the moving object.

摘要翻译： 本发明的目的是提供一种移动物体结构，能够减少通过无线通信从供电装置向移动物体供电时引起的功率损失。 另一个目的是提供能够降低辐射到周围环境的无线电波的强度的移动物体结构。 在向运动物体供电之前，从供电装置输出用于对准天线的无线电波。 也就是说，无线电波从两个阶段的馈电装置输出。 在第一阶段，输出无线电波以对准馈电装置和移动物体的天线位置。 在第二阶段，输出无线电波以从供电装置向运动物体供电。

公开(公告)号：US08441099B2

公开(公告)日：2013-05-14

申请号：US12893509

申请日：2010-09-29

申请人： Yutaka Shionoiri

发明人： Yutaka Shionoiri

IPC分类号： H01L23/02 ,  H01L29/00 ,  H01L29/04

CPC分类号： H04B5/0012 ,  G06K19/07749 ,  G06K19/0775 ,  G06K19/07775 ,  G06K19/07779 ,  H01L21/84 ,  H01L23/5223 ,  H01L23/5227 ,  H01L27/12 ,  H01L27/13 ,  H01L29/78612 ,  H01L29/78648 ,  H01L2924/0002 ,  H04B5/0056 ,  H04B5/0081 ,  H01L2924/00

摘要： An ID tag capable of communicating data wirelessly, the size of which is reduced, and where the size of an IC chip is reduced, a limited area of the chip is effectively used, current consumption is reduced, and communication distance is prevented from decreasing. The ID tag of the invention includes an IC chip having an integrated circuit, a resonance capacitor portion and a storage capacitor portion, and an antenna formed over the IC chip so as to overlap at least partially with an insulating film interposed therebetween. The antenna, the insulating film and wirings or semiconductor films forming the integrated circuit are stacked, and one or both of capacitors in the resonance capacitor portion and the storage capacitor portion are formed by this stacked structure.

摘要翻译： 能够无线地传送数据的ID标签，其尺寸减小，IC芯片的尺寸减小，有效地利用了芯片的有限区域，降低了电流消耗，防止了通信距离的下降。 本发明的ID标签包括具有集成电路的IC芯片，谐振电容器部分和存储电容器部分，以及形成在IC芯片上的至少部分地与绝缘膜重叠的天线。 层叠形成集成电路的天线，绝缘膜和布线或半导体膜，并且通过该层叠结构形成谐振电容部和电容保持部的电容器中的一方或两者。

公开(公告)号：US20130002326A1

公开(公告)日：2013-01-03

申请号：US13530384

申请日：2012-06-22

申请人： Yutaka Shionoiri ,  Hidetomo Kobayashi

发明人： Yutaka Shionoiri ,  Hidetomo Kobayashi

IPC分类号： H03K3/356 ,  H01L27/10

CPC分类号： H01L29/7869 ,  H01L27/088 ,  H01L27/1225 ,  H03K3/0375 ,  H03K19/0016 ,  H03K19/096

摘要： In a logic circuit where clock gating is performed, the standby power is reduced or malfunction is suppressed. The logic circuit includes a transistor which is in an off state where a potential difference exists between a source terminal and a drain terminal over a period during which a clock signal is not supplied. A channel formation region of the transistor is formed using an oxide semiconductor in which the hydrogen concentration is reduced. Specifically, the hydrogen concentration of the oxide semiconductor is 5×1019 (atoms/cm3) or lower. Thus, leakage current of the transistor can be reduced. As a result, in the logic circuit, reduction in standby power and suppression of malfunction can be achieved.

摘要翻译： 在执行时钟门控的逻辑电路中，待机功率降低或故障被抑制。 该逻辑电路包括在不提供时钟信号的时段内处于源极端子和漏极端子之间存在电位差的关断状态的晶体管。 使用其中氢浓度降低的氧化物半导体形成晶体管的沟道形成区域。 具体地说，氧化物半导体的氢浓度为5×1019（原子/ cm3）以下。 因此，可以减小晶体管的漏电流。 结果，在逻辑电路中，可以实现待机功率的降低和故障的抑制。

公开(公告)号：US20120293201A1

公开(公告)日：2012-11-22

申请号：US13469143

申请日：2012-05-11

申请人： Masashi Fujita ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Hidetomo Kobayashi

发明人： Masashi Fujita ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Hidetomo Kobayashi

IPC分类号： H03K19/173

CPC分类号： H03K19/17728 ,  H03K19/1737 ,  H03K19/17772 ,  H03K19/17776

摘要： An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.

摘要翻译： 目的是提供即使在电源电压停止之后也能够维持逻辑电路单元之间的连接关系或每个逻辑电路单元的电路配置的半导体器件。 另一个目的是提供一种半导体器件，其中可以高速地改变逻辑电路单元之间的连接关系或每个逻辑电路单元的电路配置。 在可重构电路中，氧化物半导体用于存储关于电路配置，连接关系等的数据的半导体元件。 具体地，氧化物半导体用于半导体元件的沟道形成区域。

公开(公告)号：US08305216B2

公开(公告)日：2012-11-06

申请号：US13226770

申请日：2011-09-07

申请人： Tomoaki Atsumi ,  Yutaka Shionoiri ,  Hidetomo Kobayashi

发明人： Tomoaki Atsumi ,  Yutaka Shionoiri ,  Hidetomo Kobayashi

IPC分类号： G08B13/14

CPC分类号： G06K19/07749 ,  G06K19/0708

摘要： Initialization of a semiconductor device can be efficiently performed, which transmits and receives data through wireless communication. The semiconductor device includes an antenna, a power source circuit, a circuit which uses a DC voltage generated by the power source circuit as a power source voltage, and a resistor. The antenna includes a pair of terminals and receives a wireless signal (a modulated carrier wave). The power source circuit includes a first terminal and a second terminal and generates a DC voltage between the first terminal and the second terminal by using a received wireless signal (the modulated carrier wave). The resistor is connected between the first terminal and the second terminal. In this manner, the semiconductor device and the wireless communication system can transmit and receive data accurately.

摘要翻译： 可以有效地执行半导体器件的初始化，其通过无线通信发送和接收数据。 半导体器件包括天线，电源电路，使用由电源电路产生的直流电压作为电源电压的电路和电阻器。 天线包括一对终端，并接收无线信号（调制载波）。 电源电路包括第一端子和第二端子，并且通过使用接收的无线信号（调制载波）在第一端子和第二端子之间产生直流电压。 电阻器连接在第一端子和第二端子之间。 以这种方式，半导体器件和无线通信系统可以准确地发送和接收数据。

公开(公告)号：US08284579B2

公开(公告)日：2012-10-09

申请号：US12553181

申请日：2009-09-03

申请人： Yutaka Shionoiri

发明人： Yutaka Shionoiri

IPC分类号： H02M7/00

CPC分类号： H02M1/4208 ,  G06K19/0701 ,  G06K19/0723 ,  H02M1/126 ,  Y02B70/126

摘要： The adverse effect of noise a constant voltage receives in a semiconductor device capable of data communication through wireless communication is suppressed. Further, communication is performed normally with a constant voltage with less noise even in the case where the amount of received power is large. The semiconductor device includes an input circuit for generating a DC voltage from an AC signal, a circuit for generating a constant voltage lower than the DC voltage, a circuit portion supplied with the constant voltage, a filter, and a feedback circuit for changing impedance with the constant voltage input from the circuit for generating a constant voltage, wherein the filter is electrically connected between the input circuit and the circuit for generating a constant voltage.

摘要翻译： 抑制了通过无线通信能够进行数据通信的半导体装置中的恒定电压的噪声的不良影响。 此外，即使在接收功率量大的情况下，通常也以具有较小噪声的恒定电压进行通信。 半导体器件包括用于从AC信号产生DC电压的输入电路，用于产生低于DC电压的恒定电压的电路，提供恒压的电路部分，滤波器和用于改变阻抗的反馈电路 从用于产生恒定电压的电路输入的恒定电压，其中滤波器电连接在输入电路和用于产生恒定电压的电路之间。

公开(公告)号：US08238476B2

公开(公告)日：2012-08-07

申请号：US13010209

申请日：2011-01-20

申请人： Kiyoshi Kato ,  Yutaka Shionoiri

发明人： Kiyoshi Kato ,  Yutaka Shionoiri

IPC分类号： H03K9/00

CPC分类号： G06K19/07749 ,  H01L27/1214 ,  H01L27/1266 ,  H01L27/13

摘要： The invention provides a semiconductor device with high yield by reducing an effect of variations in characteristics of a semiconductor element. Further, by reducing an effect of variations in characteristics of a semiconductor element to improve productivity, an inexpensive semiconductor device can be provided. Further, an inexpensive semiconductor device can be provided by forming a semiconductor device in a large amount over a large substrate such as a glass substrate and a flexible substrate. A semiconductor device of the invention includes a demodulation signal generating circuit and an antenna or a wire for connecting the antenna. The demodulation signal generating circuit includes a demodulation circuit and a correction circuit. The correction circuit corrects a first demodulation signal generated from the demodulation circuit and generates a second demodulation signal.

摘要翻译： 本发明通过减少半导体元件的特性变化的影响来提供高产率的半导体器件。 此外，通过减少半导体元件的特性变化的影响以提高生产率，可以提供便宜的半导体器件。 此外，通过在诸如玻璃基板和柔性基板的大基板上大量地形成半导体器件，可以提供廉价的半导体器件。 本发明的半导体器件包括解调信号发生电路和用于连接天线的天线或导线。 解调信号发生电路包括解调电路和校正电路。 校正电路校正从解调电路产生的第一解调信号，并产生第二解调信号。

公开(公告)号：US08237248B2

公开(公告)日：2012-08-07

申请号：US12468284

申请日：2009-05-19

申请人： Shunpei Yamazaki ,  Yoshiaki Oikawa ,  Hironobu Shoji ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Masataka Nakada

发明人： Shunpei Yamazaki ,  Yoshiaki Oikawa ,  Hironobu Shoji ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Masataka Nakada

IPC分类号： H01L23/552

CPC分类号： G06K19/07749 ,  G06K19/07735 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/1266 ,  H01L27/13 ,  H01Q1/38 ,  H01Q7/00

摘要： An object is to provide a highly reliable semiconductor device having resistance to external stress and electrostatic discharge while achieving reduction in thickness and size. Another object is to prevent defective shapes and deterioration in characteristics due to external stress or electrostatic discharge in a manufacture process to manufacture a semiconductor device with a high yield. A first insulator and a second insulator facing each other, a semiconductor integrated circuit and an antenna provided between the first insulator and the second insulator facing each other, a conductive shield provided on one surface of the first insulator, and a conductive shield provided on one surface of the second insulator are provided. The conductive shield provided on one surface of the first insulator and the conductive shield provided on one surface of the second insulator are electrically connected.

摘要翻译： 目的是提供一种具有耐外部应力和静电放电的高度可靠的半导体器件，同时实现厚度和尺寸的减小。 另一个目的是在制造过程中防止由于外部应力或静电放电而导致的形状不良和特性劣化，从而以高产率制造半导体器件。 第一绝缘体和第二绝缘体彼此面对，半导体集成电路和设置在第一绝缘体和第二绝缘体之间彼此面对的天线，设置在第一绝缘体的一个表面上的导电屏蔽和设置在第一绝缘体上的导电屏蔽 提供第二绝缘体的表面。 设置在第一绝缘体的一个表面上的导电屏蔽和设置在第二绝缘体的一个表面上的导电屏蔽电连接。

公开(公告)号：US08148818B2

公开(公告)日：2012-04-03

申请号：US12468280

申请日：2009-05-19

申请人： Shunpei Yamazaki ,  Yoshiaki Oikawa ,  Hironobu Shoji ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Masataka Nakada

发明人： Shunpei Yamazaki ,  Yoshiaki Oikawa ,  Hironobu Shoji ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Masataka Nakada

IPC分类号： H01L23/29

CPC分类号： G06K19/07749 ,  G06K19/07735 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/1266 ,  H01L27/13 ,  H01Q1/2225 ,  H01Q1/2283 ,  H01Q1/526 ,  H01Q7/00

摘要： A conductive shield covering a semiconductor integrated circuit prevents electrostatic breakdown of the semiconductor integrated circuit (e.g., malfunction of a circuit and damage to a semiconductor element) due to electrostatic discharge. Further, with use of a pair of insulators between which the semiconductor integrated circuit is sandwiched, a highly reliable semiconductor having resistance can be provided while achieving reduction in the thickness and size. Moreover, also in the manufacturing process, external stress, or defective shapes or deterioration in characteristics resulted from electrostatic discharge are prevented, and thus the semiconductor device can be manufactured with high yield.

摘要翻译： 覆盖半导体集成电路的导电屏蔽防止由于静电放电而导致的半导体集成电路的静电破坏（例如，电路的故障和对半导体元件的损坏）。 此外，通过使用夹在半导体集成电路之间的一对绝缘体，可以提供具有电阻的高可靠性的半导体，同时实现厚度和尺寸的减小。 此外，在制造过程中也防止外部应力或形状不良或由静电放电导致的特性劣化，从而可以高产率制造半导体器件。

公开(公告)号：US20120063206A1

公开(公告)日：2012-03-15

申请号：US13230122

申请日：2011-09-12

申请人： Kazuma Furutani ,  Yutaka Shionoiri

发明人： Kazuma Furutani ,  Yutaka Shionoiri

IPC分类号： G11C11/24

CPC分类号： G11C16/02 ,  G11C11/404 ,  G11C11/405 ,  G11C2207/2236

摘要： An object is to provide a semiconductor memory device capable of copying memory data without using an external circuit. The semiconductor memory device includes a bit line to which first terminals of a plurality of memory cells are connected in common; a pre-charge circuit which is connected to the bit line and pre-charges the bit line with a specific potential in data reading; a data holding circuit comprising a capacitor which temporarily holds data read out from the memory cell or data which is written to the memory cell; and an inverted data output circuit which outputs inverted data of data held in the data holding circuit to the bit line. The inverted data output circuit includes a means for controlling output of inverted data of data held in the data holding circuit.

摘要翻译： 本发明的目的是提供一种能够在不使用外部电路的情况下复制存储器数据的半导体存储器件。 半导体存储器件包括多个存储器单元的第一端子共同连接的位线; 连接到位线的预充电电路，并在数据读取中对具有特定电位的位线进行预充电; 一种数据保持电路，包括暂时保存从存储单元读出的数据或写入存储单元的数据的电容器; 以及将保持在数据保持电路中的数据的反相数据输出到位线的反相数据输出电路。 反相数据输出电路包括用于控制保持在数据保持电路中的数据的反相数据的输出的装置。