公开(公告)号：US11843004B2

公开(公告)日：2023-12-12

申请号：US17370075

申请日：2021-07-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Yasutaka Nakazawa ,  Yukinori Shima ,  Masami Jintyou ,  Masayuki Sakakura ,  Motoki Nakashima

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L21/02609 ,  H01L27/1229 ,  H01L29/04 ,  H01L29/045

Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.

公开(公告)号：US11799032B2

公开(公告)日：2023-10-24

申请号：US16978262

申请日：2019-03-05

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kenichi Okazaki ,  Masami Jintyou ,  Kensuke Yoshizumi

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/265 ,  H01L21/266

CPC classification number: H01L29/7869 ,  H01L21/02274 ,  H01L21/266 ,  H01L21/2654

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided.
The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The first insulating layer is provided over the semiconductor layer. The first conductive layer is provided over the first insulating layer. The semiconductor layer includes a first region that overlaps with the first conductive layer and the first insulating layer, a second region that does not overlap with the first conductive layer and overlaps with the first insulating layer, and a third region that overlaps with neither the first conductive layer nor the first insulating layer. The semiconductor layer contains a metal oxide. The second region and the third region contain a first element. The first element is one or more elements selected from boron, phosphorus, aluminum, and magnesium. The first element exists in a state of being bonded to oxygen.

公开(公告)号：US11757007B2

公开(公告)日：2023-09-12

申请号：US17370221

申请日：2021-07-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu Hosaka ,  Toshimitsu Obonai ,  Yukinori Shima ,  Masami Jintyou ,  Daisuke Kurosaki ,  Takashi Hamochi ,  Junichi Koezuka ,  Kenichi Okazaki ,  Shunpei Yamazaki

IPC: H01L29/24 ,  H01L29/778 ,  H01L29/786 ,  H01L27/12 ,  C03C17/245 ,  C04B35/01 ,  C04B35/453 ,  C04B35/622 ,  C23C14/08 ,  C23C14/58

CPC classification number: H01L29/24 ,  C03C17/245 ,  C04B35/01 ,  C04B35/453 ,  C04B35/62218 ,  C23C14/08 ,  C23C14/5853 ,  H01L27/1225 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/7869 ,  H01L29/78648 ,  H01L29/78696 ,  C03C2217/23 ,  C03C2218/151 ,  C04B2235/3217 ,  C04B2235/3225 ,  C04B2235/3284 ,  C04B2235/3286 ,  C04B2235/3293 ,  C04B2235/787 ,  C04B2235/96

Abstract: A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.

公开(公告)号：US11695078B2

公开(公告)日：2023-07-04

申请号：US17114765

申请日：2020-12-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/417 ,  H01L29/24 ,  H01L29/04 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02 ,  H01L21/477 ,  H01L21/465 ,  H01L21/4757 ,  H01L29/423 ,  H10K59/12 ,  H10K59/121

CPC classification number: H01L29/7869 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0262 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/465 ,  H01L21/477 ,  H01L21/47573 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/045 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H10K59/1201 ,  H10K59/1213

Abstract: The reliability of a transistor including an oxide semiconductor can be improved by suppressing a change in electrical characteristics. A transistor included in a semiconductor device includes a first oxide semiconductor film over a first insulating film, a gate insulating film over the first oxide semiconductor film, a second oxide semiconductor film over the gate insulating film, and a second insulating film over the first oxide semiconductor film and the second oxide semiconductor film. The first oxide semiconductor film includes a channel region in contact with the gate insulating film, a source region in contact with the second insulating film, and a drain region in contact with the second insulating film. The second oxide semiconductor film has a higher carrier density than the first oxide semiconductor film.

公开(公告)号：US11693288B2

公开(公告)日：2023-07-04

申请号：US17562384

申请日：2021-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami Jintyou ,  Daisuke Kurosaki ,  Masakatsu Ohno ,  Junichi Koezuka

IPC: G02F1/1368 ,  H01L27/12 ,  H01L33/62 ,  H01L29/786 ,  H10K59/12

CPC classification number: G02F1/1368 ,  G02F1/13685 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/78648 ,  H01L33/62 ,  G02F2202/10 ,  H10K59/12

Abstract: A highly reliable semiconductor device is provided. A second insulating layer is positioned over a first insulating layer. A semiconductor layer is positioned between the first insulating layer and the second insulating layer. A third insulating layer is positioned over the second insulating layer. A fourth insulating layer is positioned over the third insulating layer. A first conductive layer includes a region overlapping with the semiconductor layer, and is positioned between the third insulating layer and the fourth insulating layer. The third insulating layer includes a region in contact with a bottom surface of the first conductive layer and a region in contact with the fourth insulating layer. The fourth insulating layer is in contact with a top surface and a side surface of the first conductive layer. A fifth insulating layer is in contact with a top surface and a side surface of the semiconductor layer. The fifth insulating layer includes a first opening and a second opening in a region overlapping with the semiconductor layer and not overlapping with the first conductive layer. A second conductive layer and a third conductive layer are electrically connected to the semiconductor layer in the first opening and the second opening, respectively. The third to fifth insulating layers include metal, and oxygen or nitrogen. A sixth insulating layer includes a region in contact with a top surface and a side surface of the fifth insulating layer and a region in contact with the first insulating layer.

公开(公告)号：US11626037B2

公开(公告)日：2023-04-11

申请号：US16634955

申请日：2018-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yukinori Shima ,  Masami Jintyou

IPC: H01L29/786 ,  G09F9/30 ,  H01L51/50 ,  H01L27/32

Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer. The semiconductor layer includes a first portion overlapping with the first insulating layer, a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer, and a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer. The first portion has a smaller width than the first opening and has a thinner shape of the semiconductor layer than the second portions, and the second portions have a thinner shape of the semiconductor layer than the third portions.

公开(公告)号：US11610998B2

公开(公告)日：2023-03-21

申请号：US17257364

申请日：2019-06-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Rai Sato ,  Masami Jintyou ,  Masayoshi Dobashi ,  Takashi Shiraishi

IPC: H01L27/00 ,  H01L29/00 ,  H01L51/00 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

Abstract: A transistor in which shape defects are unlikely to occur is provided. A transistor with favorable electrical characteristics is provided. A semiconductor device with favorable electrical characteristics is provided. The semiconductor device includes a transistor. The transistor includes a semiconductor layer, a first insulating layer, a metal oxide layer, a functional layer, and a conductive layer. The first insulating layer is positioned over the semiconductor layer. The metal oxide layer is positioned over the first insulating layer. The functional layer is positioned over the metal oxide layer. The conductive layer is positioned over the functional layer. The semiconductor layer, the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer have regions overlapping with each other. In the channel length direction of the transistor, end portions of the first insulating layer, the metal oxide layer, the functional layer, and the conductive layer are positioned inward from an end portion of the semiconductor layer. An etching rate of the functional layer with an etchant containing one or more of phosphoric acid, acetic acid, nitric acid, hydrochloric acid, and sulfuric acid is lower than an etching rate of the conductive layer.

公开(公告)号：US11482626B2

公开(公告)日：2022-10-25

申请号：US16982182

申请日：2019-03-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Kenichi Okazaki ,  Masami Jintyou ,  Takahiro Iguchi ,  Yukinori Shima

IPC: H01L29/786 ,  H01L27/15 ,  H01L27/32 ,  H01L29/66

Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer containing a metal oxide, a first insulating layer, a second insulating layer, a third insulating layer containing a nitride, and a first conductive layer. The first insulating layer includes a projecting first region that overlaps with the semiconductor layer and a second region that does not overlap with the semiconductor layer and is thinner than the first region. The second insulating layer is provided to cover a top surface of the second region, a side surface of the first region, and the semiconductor layer. The first conductive layer is provided over the second insulating layer and a bottom surface of the first conductive layer over the second region includes a portion positioned below a bottom surface of the semiconductor layer.

公开(公告)号：US11430817B2

公开(公告)日：2022-08-30

申请号：US15697627

申请日：2017-09-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Junichi Koezuka ,  Yukinori Shima ,  Masami Jintyou ,  Takashi Hamochi ,  Satoshi Higano ,  Yasuharu Hosaka ,  Toshimitsu Obonai

IPC: H01L27/12 ,  H01L49/02 ,  H01L29/786 ,  H01L29/45

Abstract: A novel semiconductor device in which a metal film containing copper (Cu) is used for a wiring, a signal line, or the like in a transistor including an oxide semiconductor film is provided. The semiconductor device includes an oxide semiconductor film having conductivity on an insulating surface and a conductive film in contact with the oxide semiconductor film having conductivity. The conductive film includes a Cu—X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti).

公开(公告)号：US11355529B2

公开(公告)日：2022-06-07

申请号：US17005456

申请日：2020-08-28

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi Koezuka ,  Masami Jintyou ,  Yukinori Shima ,  Daisuke Kurosaki ,  Masataka Nakada ,  Shunpei Yamazaki

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.