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    Data fabric clock switching
    151.
    发明授权
    Data fabric clock switching 有权

    公开(公告)号：US11934251B2

    公开(公告)日：2024-03-19

    申请号：US17219407

    申请日：2021-03-31

    Applicant: Advanced Micro Devices, Inc.

    Inventor： James R. Magro ,  Christopher Weaver ,  Abhishek Kumar Verma

    IPC: G06F1/32 ,  G06F1/08 ,  G06F1/3225 ,  G06F1/3234 ,  G06F1/3287 ,  G06F3/06

    CPC classification number: G06F1/3275 ,  G06F1/08 ,  G06F1/3225 ,  G06F1/3287 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0658 ,  G06F3/0679

    Abstract: A memory controller couples to a data fabric clock domain, and to a physical layer interface circuit PHY clock domain. A first interface circuit adapts transfers between the data fabric clock domain (FCLK) and the memory controllers clock domain, and a second interface circuit couples the memory controller to the PHY clock domain. A power controller responds to a power state change request by sending commands to the second interface circuit to change parameters of a memory system and to update a set of timing parameters of the memory controller according to a selected power state of a plurality of power states. The power controller further responds to a request to synchronize with a new frequency on the FCLK domain by changing a set of timing parameters of the clock interface circuit without changing the set of timing parameters of the memory system or the selected power state.

    OVERLAY TREES FOR RAY TRACING
    153.
    发明公开
    OVERLAY TREES FOR RAY TRACING 审中-公开

    公开(公告)号：US20240087223A1

    公开(公告)日：2024-03-14

    申请号：US18506927

    申请日：2023-11-10

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Matthäus G. Chajdas ,  Konstantin I. Shkurko

    IPC: G06T17/00 ,  G06T15/06

    CPC classification number: G06T17/005 ,  G06T15/06

    Abstract: A method and a processing device for performing rendering are disclosed. The method comprises generating a base hierarchy tree comprising data representing a first object and generating a second hierarchy tree representing a second object comprising shared data of the base hierarchy tree and the second hierarchy tree and difference data. The method further comprises storing the difference data in the memory without storing the shared data, and generating an overlay hierarchy tree comprising the shared data, the difference data, and indication information indicating nodes of the overlay hierarchy tree that comprise the difference data. The method further comprises rendering the first object using the data stored for the base hierarchy tree, and rendering the second object using any one or a combination of the shared data, the difference data, and the indication information.

    BVH node ordering for efficient ray tracing
    155.
    发明授权
    BVH node ordering for efficient ray tracing 有权

    公开(公告)号：US11928770B2

    公开(公告)日：2024-03-12

    申请号：US17562271

    申请日：2021-12-27

    Applicant: Advanced Micro Devices, Inc.

    Inventor： John Alexandre Tsakok ,  Skyler Jonathon Saleh

    IPC: G06T15/06 ,  G06T15/00

    CPC classification number: G06T15/06 ,  G06T15/005 ,  G06T2210/21

    Abstract: Methods and systems are disclosed for traversing nodes in a BVH tree by an intersection engine. Techniques disclosed comprise receiving, by the intersection engine, a traversal instruction, including a tracing-mode, ray data, and an identifier of a node to be traversed. Where the tracing-mode includes a closest hit mode and a first hit mode. If the node to be traversed is an internal node, the intersection engine determines, based on the tracing-mode, an order in which children nodes of the node are to be next traversed and output identifiers of the children nodes in the determined order.

    Virtually Padding Data Structures
    160.
    发明公开
    Virtually Padding Data Structures 审中-公开

    公开(公告)号：US20240069915A1

    公开(公告)日：2024-02-29

    申请号：US17899231

    申请日：2022-08-30

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Meysam Taassori ,  Shaizeen Dilawarhusen Aga ,  Mohamed Assem Abd ElMohsen Ibrahim ,  Johnathan Robert Alsop

    IPC: G06F9/30 ,  G06F12/10 ,  G06F16/22

    CPC classification number: G06F9/30036 ,  G06F12/10 ,  G06F16/2237

    Abstract: A virtual padding unit provides a virtual padded data structure (e.g., virtually padded matrix) that provides output values for a padded data structure without storing all of the padding elements in memory. When the virtual padding unit receives a virtual memory address of a location in the virtual padded data structure, the virtual padding unit checks whether the location is a non-padded location in the virtual padded data structure or a padded location in the virtual padded data structure. If the location is a padded location in the virtual padded data structure, the virtual padding unit outputs a padding value rather than a value stored in the virtual padded data structure. If the location is a non-padded location in the virtual padded data structure, a value stored at the location is output.

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