Abstract:
Metal-oxide semiconductor (MOS) transistor offset-cancelling (OC), zero-sensing (ZS) dead zone, current-latched sense amplifiers (SAs) (CLSAs) (OCZS-SAs) for sensing differential voltages are provided. An OCZS-SA is configured to amplify received differential data and reference input voltages with a smaller sense amplifier offset voltage to provide larger sense margin between different storage states of memory bitcell(s). The OCZS-SA is configured to cancel out offset voltages of input and complement input transistors, and keep the input and complement input transistors in their activated state during sensing phases so that sensing is not performed in their “dead zones” when their gate-to-source voltage (Vgs) is below their respective threshold voltages. In other aspects, sense amplifier capacitors are configured to directly store the data and reference input voltages at gates of the input and complement input transistors during voltage capture phases to avoid additional layout area that would otherwise be consumed with additional sensing capacitor circuits.
Abstract:
An amplifier circuit with improved accuracy is provided that comprises a cascade of amplifier stages, a control line for controlling the amplifier stages, a feedback circuit having an input port for receiving a reference signal, and a feedback loop connecting the feedback circuit to the control line. Via the feedback circuit and the feedback loop, the large signal behavior of the amplifier stage is accurately fixed. As a result, the small signal gain of the amplifier stages has an improved accuracy as well.
Abstract:
Apparatus and methods for activity based plasticity in a spiking neuron network adapted to process sensory input. In one approach, the plasticity mechanism of a connection may comprise a causal potentiation portion and an anti-causal portion. The anti-causal portion, corresponding to the input into a neuron occurring after the neuron response, may be configured based on the prior activity of the neuron. When the neuron is in low activity state, the connection, when active, may be potentiated by a base amount. When the neuron activity increases due to another input, the efficacy of the connection, if active, may be reduced proportionally to the neuron activity. Such functionality may enable the network to maintain strong, albeit inactive, connections available for use for extended intervals.
Abstract:
Apparatus and methods for event based communication in a spiking neuron network. The network may comprise units communicating by spikes via synapses. The spikes may communicate a payload data. The data may comprise one or more bits. The payload may be stored in a buffer of a pre-synaptic unit and be configured to accessed by the post-synaptic unit. Spikes of different payload may cause different actions by the recipient unit. Sensory input spikes may cause postsynaptic response and trigger connection efficacy update. Teaching input spikes trigger the efficacy update without causing the post-synaptic response.
Abstract:
Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.
Abstract:
A touch panel controller may include a communications module configured to receive pixel values, where each pixel value represents a capacitance associated with a pixel formed at a drive electrode and a sensor electrode of a touch panel. The touch panel controller may also include a processing module configured to discard pixel values below a noise threshold, discard pixel values for non-zero pixels that are not adjacent to non-zero pixels, reject detected input for pixel values associated with a palm input, compute an initial centroid associated with the pixel values, reject detected input for pixel values associated with a hover input, and provide detected input that is not associated with palm input or hover input.
Abstract:
A digital camera system for super resolution image processing is provided. The digital camera system includes a resolution enhancement module configured to receive at least a portion of an image, to increase the resolution of the received image, and to output a resolution enhanced image and an edge extraction module configured to receive the resolution enhanced image, to extract at least one edge of the resolution enhanced image, and to output the extracted at least one edge of the resolution enhanced image, the at least one edge being a set of contiguous pixels where an abrupt change in pixel values occur. The digital camera system also includes an edge enhancement module configured to receive the resolution enhanced image and the extracted at least one edge, and to combine the extracted at least one edge or a derivation of the extracted at least one edge with the resolution enhanced image.
Abstract:
A system and method are disclosed for communicating coherency information between initiator and target agents on semiconductor chips. Sufficient information communication to support full coherency is performed through a socket interface using only three channels. Transaction requests are issued on one channel with responses given on a second. Intervention requests are issued on the same channel as transaction responses. Intervention responses are given on a third channel. Such an approach drastically reduces the complexity of cache coherent socket interfaces compared to conventional approaches. The net effect is faster logic, smaller silicon area, improved architecture performance, and a reduced probability of bugs by the designers of coherent initiators and targets.
Abstract:
A system and method are disclosed for communicating coherency information between initiator and target agents on semiconductor chips. Sufficient information communication to support full coherency is performed through a socket interface using only three channels. Transaction requests are issued on one channel with responses given on a second. Intervention requests are issued on the same channel as transaction responses. Intervention responses are given on a third channel. Such an approach drastically reduces the complexity of cache coherent socket interfaces compared to conventional approaches. The net effect is faster logic, smaller silicon area, improved architecture performance, and a reduced probability of bugs by the designers of coherent initiators and targets.
Abstract:
A fingerprint sensor is described that includes a thin protective cover layer on a sensor glass layer with receive circuitry between the thin protective cover layer and the sensor glass layer. In an implementation, a fingerprint sensor assembly includes a controller; a metal layer configured to be electrically coupled to the controller; a transmit layer electrically connected to the metal layer and the controller; a sensor glass layer including at least one through-glass via, where the transmit layer is disposed on a first side of the sensor glass layer, and where the transmit layer is electrically coupled to the at least one through-glass via; a receive layer disposed on a second side of the sensor glass layer, where the receive layer is electrically coupled to the at least one through-glass via; and a protective cover layer disposed on the receive layer.