公开(公告)号：US20050032326A1

公开(公告)日：2005-02-10

申请号：US10943337

申请日：2004-09-17

Applicant: Guoqing Chen ,  James Pan

Inventor： Guoqing Chen ,  James Pan

IPC: H01L21/02 ,  H01L21/8242 ,  H01L21/00 ,  H01L21/20

CPC classification number: H01L28/84 ,  H01L28/90

Abstract: The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

Abstract translation: 本发明提供一种制备用于形成HSG结构的硅晶片的表面的方法。 该方法考虑提供具有包含在BPSG中形成的多晶硅的至少一个HSG模板的晶片，HSG模板被二氧化硅覆盖。 用清洁剂处理晶片以清洁晶片的表面。 接下来，用调理剂处理晶片。 调理剂从HSG模板中除去天然氧化物，而不会过度蚀刻结构BPSG。 优选地，调理剂还在HSG模板上除去薄层的多晶硅。 然后将晶片转移到用于HSG形成的处理室。

公开(公告)号：US20050032170A1

公开(公告)日：2005-02-10

申请号：US10942659

申请日：2004-09-16

Applicant: James Pan ,  Audrey Goddard ,  William Wood

Inventor： James Pan ,  Audrey Goddard ,  William Wood

IPC: A01K67/027 ,  A61K38/00 ,  A61K38/17 ,  A61K39/00 ,  A61K39/395 ,  A61P1/14 ,  A61P3/00 ,  A61P3/04 ,  A61P3/06 ,  A61P7/00 ,  C07H21/04 ,  C07K14/00 ,  C07K14/435 ,  C07K14/47 ,  C07K14/705 ,  C07K16/18 ,  C07K16/46 ,  C07K19/00 ,  C12N20060101 ,  C12N1/19 ,  C12N1/21 ,  C12N5/00 ,  C12N5/06 ,  C12N5/10 ,  C12N9/00 ,  C12N15/00 ,  C12N15/09 ,  C12N15/12 ,  C12N15/62 ,  C12N15/63 ,  C12P21/02 ,  C12P21/08 ,  C12Q20060101 ,  C12Q1/02 ,  G01N33/15 ,  G01N33/50 ,  G01N33/53 ,  G01N33/566 ,  G01N33/68

CPC classification number: C07K14/47 ,  G01N33/6893 ,  G01N2800/02

Abstract: The present invention is directed to novel polypeptides NS4 and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention. Furthermore, methods of treating body weight disorders (e.g., obesity, cachexia or anorexia) are provided.

Abstract translation: 本发明涉及新型多肽NS4和编码那些多肽的核酸分子。 本文还提供了包含那些核酸序列的载体和宿主细胞，包含与异源多肽序列融合的本发明的多肽的嵌合多肽分子，与本发明的多肽结合的抗体以及本发明的多肽的制备方法 发明。 此外，提供了治疗体重紊乱（例如肥胖症，恶病质或厌食症）的方法。

公开(公告)号：US06828193B2

公开(公告)日：2004-12-07

申请号：US10174696

申请日：2002-06-18

Applicant: Guoqing Chen ,  James Pan

Inventor： Guoqing Chen ,  James Pan

IPC: H01L218242

CPC classification number: H01L28/84 ,  H01L28/90

Abstract: The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

公开(公告)号：US06723535B2

公开(公告)日：2004-04-20

申请号：US09906700

申请日：2001-07-16

Applicant: Avi Ashkenazi ,  David Botstein ,  Luc Desnoyers ,  Dan L. Eaton ,  Napoleone Ferrara ,  Ellen Filvaroff ,  Sherman Fong ,  Wei-Qiang Gao ,  Hanspeter Gerber ,  Mary E. Gerritsen ,  Audrey Goddard ,  Paul J. Godowski ,  J. Christopher Grimaldi ,  Austin L. Gurney ,  Kenneth J. Hillan ,  Ivar J. Kljavin ,  Jennie P. Mather ,  James Pan ,  Nicholas F. Paoni ,  Margaret Ann Roy ,  Timothy A. Stewart ,  Daniel Tumas ,  P. Mickey Williams ,  William I. Wood

Inventor： Avi Ashkenazi ,  David Botstein ,  Luc Desnoyers ,  Dan L. Eaton ,  Napoleone Ferrara ,  Ellen Filvaroff ,  Sherman Fong ,  Wei-Qiang Gao ,  Hanspeter Gerber ,  Mary E. Gerritsen ,  Audrey Goddard ,  Paul J. Godowski ,  J. Christopher Grimaldi ,  Austin L. Gurney ,  Kenneth J. Hillan ,  Ivar J. Kljavin ,  Jennie P. Mather ,  James Pan ,  Nicholas F. Paoni ,  Margaret Ann Roy ,  Timothy A. Stewart ,  Daniel Tumas ,  P. Mickey Williams ,  William I. Wood

IPC: C12N1512

CPC classification number: C07K16/18

Abstract: The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.

公开(公告)号：US06664376B2

公开(公告)日：2003-12-16

申请号：US09905125

申请日：2001-07-12

Applicant: Avi Ashkenazi ,  David Botstein ,  Luc Desnoyers ,  Dan L. Eaton ,  Napoleone Ferrara ,  Ellen Filvaroff ,  Sherman Fong ,  Wei-Qiang Gao ,  Hanspeter Gerber ,  Mary E. Gerritsen ,  Audrey Goddard ,  Paul J. Godowski ,  J. Christopher Grimaldi ,  Austin L. Gurney ,  Kenneth J. Hillan ,  Ivar J. Kljavin ,  Jennie P. Mather ,  James Pan ,  Nicholas F. Paoni ,  Margaret Ann Roy ,  Timothy A. Stewart ,  Daniel Tumas ,  P. Mickey Williams ,  William I. Wood

Inventor： Avi Ashkenazi ,  David Botstein ,  Luc Desnoyers ,  Dan L. Eaton ,  Napoleone Ferrara ,  Ellen Filvaroff ,  Sherman Fong ,  Wei-Qiang Gao ,  Hanspeter Gerber ,  Mary E. Gerritsen ,  Audrey Goddard ,  Paul J. Godowski ,  J. Christopher Grimaldi ,  Austin L. Gurney ,  Kenneth J. Hillan ,  Ivar J. Kljavin ,  Jennie P. Mather ,  James Pan ,  Nicholas F. Paoni ,  Margaret Ann Roy ,  Timothy A. Stewart ,  Daniel Tumas ,  P. Mickey Williams ,  William I. Wood

IPC: C07K14435

CPC classification number: C07K14/47 ,  C07K14/705 ,  C07K2319/00

Abstract: The present invention is directed to novel polypeptides and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.

公开(公告)号：US06544842B1

公开(公告)日：2003-04-08

申请号：US09303385

申请日：1999-05-01

Applicant: Guoqing Chen ,  James Pan

Inventor： Guoqing Chen ,  James Pan

IPC: H01L218242

CPC classification number: H01L28/84 ,  H01L28/90

Abstract: The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

Abstract translation: 本发明提供一种制备用于形成HSG结构的硅晶片的表面的方法。 该方法考虑提供具有包含在BPSG中形成的多晶硅的至少一个HSG模板的晶片，HSG模板被二氧化硅覆盖。 用清洁剂处理晶片以清洁晶片的表面。 接下来，用调理剂处理晶片。 调理剂从HSG模板中除去天然氧化物，而不会过度蚀刻结构BPSG。 优选地，调理剂还在HSG模板上除去薄层的多晶硅。 然后将晶片转移到用于HSG形成的处理室。

公开(公告)号：US06126847A

公开(公告)日：2000-10-03

申请号：US977251

申请日：1997-11-24

Applicant: Randhir Thakur ,  James Pan

Inventor： Randhir Thakur ,  James Pan

IPC: H01L21/302 ,  H01L21/02 ,  H01L21/205 ,  H01L21/306 ,  H01L21/311 ,  H01L21/316 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108 ,  B44C1/22

CPC classification number: H01L28/40 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31116

Abstract: A process for etching oxides having differing densities which is not only highly selective, but which also produces uniform etches is provided and includes the steps of providing an oxide layer on a surface of a substrate, exposing the oxide layer to a liquid comprising a halide-containing species, and exposing the oxide layer to a gas phase comprising a halide-containing species. The process desirably is used to selectively etch a substrate surface in which the surface of the substrate includes on a first portion thereof a first silicon oxide and on a second portion thereof a second silicon oxide, with the first silicon oxide being relatively more dense than the second silicon oxide, such as, for example, a process which forms a capacitor storage cell on a semiconductor substrate.

公开(公告)号：US20210111663A1

公开(公告)日：2021-04-15

申请号：US16597696

申请日：2019-10-09

Applicant: James Pan

Inventor： James Pan

IPC: H02S20/00 ,  H02S40/38 ,  H01L31/07 ,  H01L31/0224

Abstract: The present invention is about a magnetic solar cell with a semiconductor memory and battery, capable of achieving higher solar efficiency and energy storage capability. The semiconductor magnetic solar system features the following components: a section of very low work function metal, which is physically “floating” in vacuum, as sustained by magnetic fields, and a section of semiconductor to form an Avalanche Breakdown Schottky Diode, and a memory/battery storage unit with a high work function metal.

公开(公告)号：US08772868B2

公开(公告)日：2014-07-08

申请号：US13095670

申请日：2011-04-27

Applicant: Joseph A. Yedinak ,  Mark L. Rinehimer ,  Praveen Muraleedharan Shenoy ,  Hamza Yilmaz ,  James Pan ,  Rodney S. Ridley, Sr.

Inventor： Joseph A. Yedinak ,  Mark L. Rinehimer ,  Praveen Muraleedharan Shenoy ,  Hamza Yilmaz ,  James Pan ,  Rodney S. Ridley, Sr.

IPC: H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/0243 ,  H01L21/02579 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/8611 ,  H01L29/872

Abstract: A power device includes a semiconductor substrate having a plurality of alternately arranged pillars of first and second conductivity types. At least one of the plurality of pillars of second conductivity type includes a first trench epitaxial layer of the second conductivity type disposed on a trench sidewall of the second trench and a trench bottom surface of the second trench, a second trench epitaxial layer of the second conductivity type disposed on the first trench epitaxial layer of the second conductivity type, and an insulating material layer disposed on the second trench epitaxial layer of the second conductivity type.

Abstract translation: 功率器件包括具有多个交替布置的第一和第二导电类型的柱的半导体衬底。 第二导电类型的多个支柱中的至少一个包括设置在第二沟槽的沟槽侧壁上的第二导电类型的第一沟槽外延层和第二沟槽的沟槽底表面，第二沟槽外延层的第二沟槽外延层 设置在第二导电类型的第一沟槽外延层上的导电类型，以及设置在第二导电类型的第二沟槽外延层上的绝缘材料层。

公开(公告)号：US08445975B2

公开(公告)日：2013-05-21

申请号：US13290275

申请日：2011-11-07

Applicant: James Pan ,  John Pellerin

Inventor： James Pan ,  John Pellerin

IPC: H01L21/02

CPC classification number: H01L21/28008 ,  H01L21/28088 ,  H01L21/28238 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

Abstract: A semiconductor device has a substrate, a gate dielectric layer, and a metal gate electrode on the gate dielectric layer. The gate dielectric layer includes an oxide layer having a dielectric constant (k) greater than 4, and silicon concentrated at interfaces of the oxide layer with the substrate and with the metal gate electrode. A method of fabricating a semiconductor device includes forming a removable gate over a substrate with a gate dielectric layer between the removable gate and the substrate, forming a dielectric layer over the substrate and exposing an upper surface of the removable gate, removing the removable gate leaving an opening in the dielectric layer, forming a protective layer on the gate dielectric layer and lining the opening, and forming a metal gate electrode in the opening. The protective layer has a graded composition between the gate dielectric layer and the metal gate electrode.

Abstract translation: 半导体器件在栅极电介质层上具有衬底，栅极电介质层和金属栅电极。 栅极电介质层包括介电常数（k）大于4的氧化物层，并且硅集中在氧化物层与衬底和金属栅电极的界面处。 一种制造半导体器件的方法包括在衬底上形成可移除栅极，在可移除栅极和衬底之间具有栅极电介质层，在衬底上形成电介质层并露出可移除栅极的上表面，去除可移除栅极离开 在电介质层中形成开口，在栅极电介质层上形成保护层并衬套开口，并在开口中形成金属栅电极。 保护层在栅极电介质层和金属栅电极之间具有渐变组成。