公开(公告)号：US20110197809A1

公开(公告)日：2011-08-18

申请号：US13027063

申请日：2011-02-14

Applicant: Hyon-Jong Cho ,  Hong Woo Lee ,  Min-Seok Kwak ,  Ji-Hun Moon

Inventor： Hyon-Jong Cho ,  Hong Woo Lee ,  Min-Seok Kwak ,  Ji-Hun Moon

IPC: C30B11/02 ,  F25D23/06 ,  B82Y30/00

CPC classification number: C30B15/14 ,  C30B15/206 ,  C30B29/06 ,  Y10T117/1016

Abstract: Provided are a single crystal cooler and a single crystal grower including the same. The single crystal cooler includes a cooling main body and a passage. The passage is formed on an inner wall and an outer wall of the cooling main body. The passage allows cooling materials to move therethrough. The single crystal cooler has a cylindrical shape. A first inner diameter R1 of the single crystal cooler is about 1.5 times or more greater than an inner diameter R2 of a single crystal grown by applying the single crystal cooler.

Abstract translation: 提供单晶冷却器和包括其的单晶种植者。 单晶冷却器包括冷却主体和通道。 通道形成在冷却主体的内壁和外壁上。 通道允许冷却材料通过其移动。 单晶冷却器具有圆柱形形状。 单晶冷却器的第一内径R1比通过施加单晶冷却器生长的单晶的内径R2大大约1.5倍或更大。

公开(公告)号：US07903207B2

公开(公告)日：2011-03-08

申请号：US11210280

申请日：2005-08-23

Applicant: Back-Won Lee ,  Jeong-Il Kim ,  Hong-Woo Lee

Inventor： Back-Won Lee ,  Jeong-Il Kim ,  Hong-Woo Lee

IPC: G02F1/1335

CPC classification number: G02F1/133514 ,  G02F1/13454 ,  G02F1/136227 ,  G02F2001/136222

Abstract: A display substrate comprises a base substrate divided into a display region and a peripheral region surrounding the display region, wherein an image is displayed in the display region, a pixel part formed in the display region of the base substrate, a first color filter layer formed on the base substrate including the pixel part, wherein the first color filter layer is formed in the display region, and a second color filter layer formed in the peripheral region of the base substrate.

Abstract translation: 显示基板包括分为显示区域和围绕显示区域的周边区域的基底基板，其中在显示区域中显示图像，形成在基底基板的显示区域中的像素部分，形成的第一滤色器层 在包括像素部分的基底基板上，其中第一滤色器层形成在显示区域中，以及形成在基底基板的周边区域中的第二滤色器层。

公开(公告)号：US07816683B2

公开(公告)日：2010-10-19

申请号：US11839125

申请日：2007-08-15

Applicant: Bong-Jun Lee ,  Myung-Koo Hur ,  Sung-Man Kim ,  Hong-Woo Lee

Inventor： Bong-Jun Lee ,  Myung-Koo Hur ,  Sung-Man Kim ,  Hong-Woo Lee

IPC: H01L31/00 ,  G09G3/36 ,  G02F1/135

CPC classification number: G09G3/3659 ,  G09G3/3614 ,  G09G2300/0443 ,  G09G2300/0452 ,  G09G2310/0251 ,  G09G2310/0281

Abstract: In an array substrate and a display apparatus, a gate line receives a gate pulse during a present 1H period and a data line receives a pixel voltage having a polarity inverted at every frame. When a thin film transistor is turned on in response to the gate pulse during the present 1H period, a pixel electrode receives the pixel voltage through the thin film transistor during the present 1H period. A pre-charging part pre-charges the pixel electrode to a common voltage that is a reference voltage of the pixel voltage in response to a previous gate pulse during a previous 1H period.

Abstract translation: 在阵列基板和显示装置中，栅极线在当前1H周期期间接收栅极脉冲，并且数据线接收每帧具有极性反转的像素电压。 当在本1H时段期间响应于栅极脉冲导通薄膜晶体管时，像素电极在本1H时段期间通过薄膜晶体管接收像素电压。 预充电部分将像素电极预充电到作为像素电压的参考电压的公共电压，该公共电压响应于之前的1H周期期间的先前的栅极脉冲。

公开(公告)号：US07799130B2

公开(公告)日：2010-09-21

申请号：US11460408

申请日：2006-07-27

Applicant: Young Ho Hong ,  Man Seok Kwak ,  Ill-Soo Choi ,  Hyon-Jong Cho ,  Hong Woo Lee

Inventor： Young Ho Hong ,  Man Seok Kwak ,  Ill-Soo Choi ,  Hyon-Jong Cho ,  Hong Woo Lee

IPC: C30B15/00

CPC classification number: C30B30/04 ,  C30B15/305 ,  C30B29/06 ,  Y10S117/917

Abstract: A silicon single crystal ingot growing apparatus for growing a silicon single crystal ingot based on a Czochralski method The silicon single crystal ingot growing apparatus includes a chamber; a crucible provided in the chamber, and for containing a silicon melt; a heater provided at the outside of the crucible and for heating the silicon melt; a pulling unit for ascending a silicon single crystal grown from the silicon melt; and a plurality of magnetic members provided at the outside of the chamber and for asymmetrically applying a magnetic field to the silicon melt Such a structure can uniformly controls an oxygen concentration at a rear portion of a silicon single crystal ingot using asymmetric upper/lower magnetic fields without replacing a hot zone In addition, such a structure can controls a flower phenomenon generated on the growth of the single crystal by the asymmetric magnetic fields without a loss such as the additional hot zone (H/Z) replacement, P/S down, and SR variance.

Abstract translation: 一种用于生长基于切克劳斯基法的硅单晶锭的硅单晶锭生长装置。硅单晶锭生长装置包括：室; 设置在所述室中并用于容纳硅熔体的坩埚; 设置在坩埚外侧并用于加热硅熔体的加热器; 用于使从硅熔体生长的硅单晶上升的拉伸单元; 以及设置在室外的多个磁性部件，用于对硅熔体非对称地施加磁场。这种结构可以使用不对称的上/下磁场均匀地控制硅单晶锭后部的氧浓度 另外，这种结构也可以通过非对称磁场来控制单晶生长产生的花朵现象，而不会有额外的热区（H / Z）替换，P / S下降等损失， 和SR方差。

公开(公告)号：US20100197086A1

公开(公告)日：2010-08-05

申请号：US12755920

申请日：2010-04-07

Applicant: Do Gi Lim ,  Jong Hwan Lee ,  Hong Woo Lee ,  Yong Jo Kim ,  Yong Woo Lee

Inventor： Do Gi Lim ,  Jong Hwan Lee ,  Hong Woo Lee ,  Yong Jo Kim ,  Yong Woo Lee

IPC: H01L21/336

CPC classification number: H01L27/1222 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1288

Abstract: A thin film transistor substrate, wherein the moving area of electrons between source and drain electrodes of a thin film transistor (TFT) is minimized, the moving distance of electrons is increased, and the sizes of capacitors defined by a gate electrode together with the respective source and drain electrodes are identical to each other so that an off current generated when the TFT is off can be minimized; a method of manufacturing the thin film transistor substrate; and a mask for manufacturing the thin film transistor substrate. Accordingly, it is possible to minimize an off current induced due to a phenomenon of electron trapping by light.

Abstract translation: 一种薄膜晶体管基板，其中薄膜晶体管（TFT）的源极和漏极之间的电子的移动面积最小化，电子的移动距离增加，并且由栅电极限定的电容器的尺寸与相应的 源极和漏极彼此相同，使得当TFT截止时产生的截止电流可以最小化; 制造薄膜晶体管基板的方法; 以及用于制造薄膜晶体管基板的掩模。 因此，可以将由于光的电子俘获现象引起的截止电流最小化。

公开(公告)号：US20090219477A1

公开(公告)日：2009-09-03

申请号：US12464420

申请日：2009-05-12

Applicant: Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

Inventor： Sung-Man Kim ,  Myung-Koo Hur ,  Jong-Hwan Lee ,  Yong Woo Lee ,  Hong-Woo Lee ,  Jin-Suk Seo

IPC: G02F1/1343

CPC classification number: G02F1/133707

Abstract: Disclosed is a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer interposed there between. The first substrate is provided with gate lines and data lines thereon. The gate lines and data lines cross with each other and are insulated from each other. Pixel electrodes are stacked on the gate lines and data lines. Each pixel electrode includes first and second sub-pixel electrodes spaced apart from each other and a connection electrode, which connects the first sub-pixel electrode to the second sub-pixel electrode. The second substrate is provided with a common electrode thereon. The common electrode includes a first domain divider formed on the center of the first sub-pixel electrode and a second domain divider formed on the center of the second sub-pixel electrode.

Abstract translation: 公开了一种液晶显示装置，包括第一基板，第二基板和介于其间的液晶层。 第一基板上设置有栅线和数据线。 栅极线和数据线彼此交叉并且彼此绝缘。 像素电极堆叠在栅极线和数据线上。 每个像素电极包括彼此间隔开的第一和第二子像素电极和将第一子像素电极连接到第二子像素电极的连接电极。 第二基板上设置有公共电极。 公共电极包括形成在第一子像素电极的中心上的第一域分隔器和形成在第二子像素电极的中心的第二域分隔器。

公开(公告)号：US20090090294A1

公开(公告)日：2009-04-09

申请号：US12244283

申请日：2008-10-02

Applicant: Young-Ho Hong ,  Hyon-Jong Cho ,  Sung-Young Lee ,  Seung-Ho Shin ,  Hong-Woo Lee

Inventor： Young-Ho Hong ,  Hyon-Jong Cho ,  Sung-Young Lee ,  Seung-Ho Shin ,  Hong-Woo Lee

IPC: C30B15/20 ,  C30B35/00

CPC classification number: C30B15/14 ,  C30B15/203 ,  C30B15/206 ,  C30B29/06

Abstract: The present invention relates to a method for manufacturing an ultra low defect semiconductor single crystalline ingot, which uses a Czochralski process for growing a semiconductor single crystalline ingot through a solid-liquid interface by dipping a seed into a semiconductor melt received in a quartz crucible and slowly pulling up the seed while rotating the seed, wherein a defect-free margin is controlled by increasing or decreasing a heat space on a surface of the semiconductor melt according to change in length of the single crystalline ingot as progress of the single crystalline ingot growth process.

Abstract translation: 本发明涉及一种用于制造超低缺陷半导体单晶锭的方法，该方法使用Czochralski工艺，通过将种子浸入容纳在石英坩埚中的半导体熔体中，通过固 - 液界面生长半导体单晶锭;以及 在旋转种子的同时慢慢拉起种子，其中随着单晶锭生长的进展，根据单晶锭的长度变化增加或减少半导体熔体的表面上的热空间来控制无缺陷边缘 处理。

公开(公告)号：US20080266477A1

公开(公告)日：2008-10-30

申请号：US11869197

申请日：2007-10-09

Applicant: Bong-Jun LEE ,  Kyung-wook KIM ,  Jong-oh KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Hyuk-jin KIM

Inventor： Bong-Jun LEE ,  Kyung-wook KIM ,  Jong-oh KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Hyuk-jin KIM

IPC: H03K3/01 ,  G02F1/1368

CPC classification number: G09G3/3677 ,  G02F1/13454 ,  G09G2310/0286 ,  G09G2340/145 ,  G11C19/184

Abstract: A gate driving circuit has a first stage which includes: a pull-up driving unit which receives a first carry signal from a second stage and outputs a control signal having first, second, third and fourth voltages to a first node during a preliminary period, a gate active period, a first gate inactive period and a second gate inactive period, respectively; a pull-up unit which receives the control signal and outputs a gate-on signal to a second node during the gate active period; a carry output unit which receives the control signal and outputs a second carry signal to a third stage during the gate active period; and a pull-down unit which receives a gate-off signal and the second carry signal from the second stage and outputs the control signal having the fourth voltage level to the first node during the second gate inactive period.

Abstract translation: 栅极驱动电路具有第一级，其包括：上拉驱动单元，其从初级阶段接收来自第二级的第一进位信号，并将具有第一，第二，第三和第四电压的控制信号输出到第一节点， 栅极有效期，第一栅极无效期和第二栅极非有效期; 上拉单元，其在所述门有效期间内接收所述控制信号并将栅极导通信号输出到第二节点; 进位输出单元，其在所述门有效期间内接收所述控制信号并将第二进位信号输出到第三级; 以及下拉单元，其从第二级接收栅极关闭信号和第二进位信号，并且在第二栅极非活动时段期间将具有第四电压电平的控制信号输出到第一节点。

公开(公告)号：US20080143934A1

公开(公告)日：2008-06-19

申请号：US11956437

申请日：2007-12-14

Applicant: Hyeong-jun PARK ,  Byeong-jae AHN ,  Beom-jun KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Jong-hyuk LEE

Inventor： Hyeong-jun PARK ,  Byeong-jae AHN ,  Beom-jun KIM ,  Sung-man KIM ,  Hong-woo LEE ,  Jong-hyuk LEE

IPC: G02F1/1335

CPC classification number: G02F1/133514 ,  G02F2001/133337 ,  G02F2001/133567

Abstract: A liquid crystal display (“LCD”) capable of preventing or substantially reducing migration of impurities in a liquid crystal layer, thereby preventing or substantially reducing an occurrence of line afterimages that may be caused by the impurities, includes gate lines and data lines intersecting on an insulating substrate, pixels arranged in a matrix shape, color organic films formed on the insulating substrate and corresponding to the pixels, and indentations or other formations formed between adjacent color organic films.

Abstract translation: 能够防止或基本上减少液晶层中的杂质的迁移，从而防止或显着减少由杂质引起的线残影的出现的液晶显示器（“LCD”）包括与其相交的栅极线和数据线 绝缘基板，排列成矩阵状的像素，形成在绝缘基板上并对应于像素的彩色有机膜，以及在相邻的彩色有机膜之间形成的凹陷或其他结构。

公开(公告)号：US07378071B2

公开(公告)日：2008-05-27

申请号：US11178096

申请日：2005-07-07

Applicant: Hyon-Jong Cho ,  Cheol-Woo Lee ,  Hong-Woo Lee ,  Cheong Jin Soo ,  Kim Sunmi

Inventor： Hyon-Jong Cho ,  Cheol-Woo Lee ,  Hong-Woo Lee ,  Cheong Jin Soo ,  Kim Sunmi

IPC: C01B33/26 ,  C30B15/20

CPC classification number: C30B29/06 ,  C30B15/305

Abstract: A method for growing a silicon single crystal ingot by a Czochralski method, which is capable of providing silicon wafers having very uniform in-plane quality and which results in improvement of semiconductor device yield. A method is provided for producing a silicon single crystal ingot by a Czochralski method, wherein when convection of a silicon melt is divided into a core cell and an outer cell, the silicon single crystal ingot is grown under the condition that the maximal horizontal direction width of the core cell is 30 to 60% of a surface radius of the silicon melt. In one embodiment the silicon single crystal ingot is grown under the condition that the maximal vertical direction depth of the core cell is equal to or more than 50% of the maximal depth of the silicon melt.

Abstract translation: 一种通过切克劳斯基法生长硅单晶锭的方法，其能够提供具有非常均匀的面内质量的硅晶片，并且导致半导体器件产率的提高。 提供了一种通过切克劳斯基法（Czochralski method）制造硅单晶锭的方法，其中当将硅熔体的对流分为芯电池和外电池时，硅单晶锭在最大水平方向宽度 的核心单元是硅熔体表面半径的30-60％。 在一个实施例中，在单芯晶圆的最大垂直方向深度等于或大于硅熔体的最大深度的50％的条件下，生长硅单晶锭。