Abstract:
A thin film transistor and a manufacturing method thereof are provided. The thin film transistor includes a gate, an oxide channel layer, a gate insulating layer, a source, a drain and a dielectric layer. The gate is disposed on a substrate. The oxide channel layer, disposed on the substrate, is stacked with the gate. A material of the oxide channel layer includes a metal element. The metal element content shows a gradient distribution along a thickness direction of the oxide channel layer. The gate insulation layer is disposed between the gate and the oxide channel layer. The source and the drain are disposed in parallel to each other, and connected to the oxide channel layer. Sides of the source and the drain, facing away from the substrate, are covered by the dielectric layer.
Abstract:
The present invention discloses a method, device and system for configuring codebooks. The method comprises a transmitting end selecting a code word restricted sub-set and informing a receiving end of the code word restricted sub-set, the code word restricted sub-set containing part or all of code words in a first codebook and/or a second codebook; and the receiving end selecting an optimal pre-coded code word from the code word restricted sub-set and informing the transmitting end of an index of the optimal pre-coded code word. By the present invention, code word restriction is implemented in the case of dual codebooks in the LTE-A system such that the calculation complexity is reduced when the receiving end selects the code word, occurrences of the case where the receiving end selects the code word wrongly are decreased, and the signaling structure in the LTE system can be inherited very well.
Abstract:
An electronic device enclosure includes a rear panel and a blocking board. The rear panel comprises a front surface and a back surface opposite to the front surface. A through opening is defined in the rear panel. The blocking board comprises a main body, a first flange and a second flange opposite to the first flange. A first stopping piece is extends from the first flange. A second stopping piece is extended from the second flange. A latch portion is located on the first flange. A first protrusion is located on the second flange. The latch portion and the second protrusion extend through the through opening by being elastically deformed, the latch portion and the second protrusion abut on the front surface, and the first stopping piece and the second stopping piece abut on the back surface.
Abstract:
A method for mapping downlink dedicated pilots to resource elements in an Extended Cyclic Prefix frame structure, applied in a long term evolution system, includes the following steps: the first downlink dedicated pilot of each port is mapped to the specific position of a physical resource block; other downlink dedicated pilots of the port are mapping-processed according to the time-domain interval, frequency-domain interval and a preset regulation; the time-domain interval is two or three OFDM symbols, and the frequency-domain interval is two subcarriers of the same time domain. By defining the positions of pilots in the physical resource block, downlink dedicated pilots can obtain the information of all channels when a base station uses a beamforming of more than four antennas. Making the channel information obtained by dedicated pilots contain the real channel information and the process-weight-value of a beamforming, a UE does not need to obtain the transmission-weight-value of a beamforming, thereby avoiding the feedback overhead of beamforming weight-values.
Abstract:
A connector includes a body and a socket extending from the body. A blocking wall is located on the body. The socket includes a top wall, a resilient piece located on the top wall. The blocking wall is surrounded the resilient piece for preventing the resilient piece from destroying.
Abstract:
A method of multi-chip wafer level packaging comprises forming a reconfigured wafer using a plurality of photo-sensitive material layers. A plurality of semiconductor chips and wafers are embedded in the photo-sensitive material layers. Furthermore, a variety of through assembly vias are formed in the photo-sensitive material layers. Each semiconductor chip embedded in the photo-sensitive material layers is connected to input/output pads through connection paths formed by the through assembly vias.
Abstract:
Apparatus and methods for providing a molded chip interposer structure and assembly. A molded chip structure having at least two integrated circuit dies disposed within a mold compound is provided having the die bond pads on the bottom surface; and solder bumps are formed in the openings of a dielectric layer on the bottom surface, the solder bumps forming connections to the bond pads. An interposer having a die side surface and a board side surface is provided having bump lands receiving the solder bumps of the molded chip structure on the die side of the interposer. An underfill layer is formed between the die side of the interposer and the bottom surface of the molded chip structure surrounding the solder bumps. Methods for forming the molded chip interposer structure are disclosed.
Abstract:
A light-emitting diode (LED) device, includes a substrate, having a first and a second surfaces, a first bonding layer, disposed on the first surface, a first epitaxial structure, having a third and a fourth surfaces and comprising a first and a second groove, wherein the first epitaxial structure comprises a second electrical type semiconductor layer, an active layer and a first electrical type semiconductor layer sequentially stacked on the first bonding layer, and the first groove extends from the fourth surface to the first electrical type semiconductor layer via the active layer, the second groove extends from the fourth surface to the third surface, a first electrical type conductive branch, a first electrical type electrode layer, an insulating layer, filled in the first and the second grooves, and a second electrical type electrode layer, electrically connected to the second electrical type semiconductor layer.
Abstract:
A method of processing a video input which transmits pictures of a first view and pictures of a second view includes: checking the video input to detect if a first picture of one of the first and second views is correctly paired with a second picture of the other of the first and second views for a specific presentation time, and accordingly generating a detecting result; and referring to the detecting result for selectively performing a predetermined processing operation upon the video input.
Abstract:
A method for updating data in a media storage location includes: storing an identity on a portable electronic device, the identity allowing access to the media storage location; storing a file in a device memory of the portable electronic device, the file being captured by a media capturing component of the portable electronic device; and performing a synchronization operation using a media manager, the media manager being in communication with the device memory and the media storage location; the synchronization operation synchronizing data between the device memory and the media storage location.