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公开(公告)号：US07266712B2
公开(公告)日：2007-09-04
申请号：US11521649
申请日：2006-09-15
IPC分类号： G06F1/00
CPC分类号： G06F1/324 , G06F1/206 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and circuits to define a thermal operating mode for a integrated device by defining an operating voltage and a frequency range.
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公开(公告)号：US20070011477A1
公开(公告)日：2007-01-11
申请号：US11521649
申请日：2006-09-15
IPC分类号： G06F1/00
CPC分类号： G06F1/324 , G06F1/206 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and circuits to define a thermal operating mode for a integrated device by defining an operating voltage and a frequency range.
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公开(公告)号：US06891417B2
公开(公告)日：2005-05-10
申请号：US10612722
申请日：2003-07-02
申请人： Tanveer R Khondker , Vijay Vuppaladadium , Inder Sodhi , Venkatesh Prasanna , Kedar Mangrulkar , Miguel Corvacho , Nakul Arora
发明人： Tanveer R Khondker , Vijay Vuppaladadium , Inder Sodhi , Venkatesh Prasanna , Kedar Mangrulkar , Miguel Corvacho , Nakul Arora
摘要： Circuits and methods align an internal signal with an external signal. A phase lock loop network receives the external signal to generate phase lock loop signals. A programmable ratio decoder provides a code. An alignment unit generates the internal signal based on at least one of the phase lock loop signals. The alignment unit aligns internal signal with the external signal based on the code.
摘要翻译： 电路和方法使内部信号与外部信号对齐。 锁相环网络接收外部信号以产生锁相环信号。 可编程比率解码器提供代码。 对准单元基于至少一个锁相环信号产生内部信号。 对齐单元根据代码将内部信号与外部信号对齐。
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公开(公告)号：US20050001664A1
公开(公告)日：2005-01-06
申请号：US10612722
申请日：2003-07-02
申请人： Tanveer Khondker , Vijay Vuppaladadium , Inder Sodhi , Venkatesh Prasanna , Kedar Mangrulkar , Miguel Corvacho , Nakul Arora
发明人： Tanveer Khondker , Vijay Vuppaladadium , Inder Sodhi , Venkatesh Prasanna , Kedar Mangrulkar , Miguel Corvacho , Nakul Arora
摘要： Circuits and methods align an internal signal with an external signal. A phase lock loop network receives the external signal to generate phase lock loop signals. A programmable ratio decoder provides a code. An alignment unit generates the internal signal based on at least one of the phase lock loop signals. The alignment unit aligns internal signal with the external signal based on the code.
摘要翻译： 电路和方法使内部信号与外部信号对齐。 锁相环网络接收外部信号以产生锁相环信号。 可编程比率解码器提供代码。 对准单元基于至少一个锁相环信号产生内部信号。 对齐单元根据代码将内部信号与外部信号对齐。
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15.发明申请System, Method and Apparatus For Energy Efficiency And Energy Conservation By Configuring Power Management Parameters During Run Time 有权通过在运行时配置电源管理参数，实现节能和节能的系统，方法和装置公开(公告)号：US20130283026A1
公开(公告)日：2013-10-24
申请号：US13843405
申请日：2013-03-15
申请人： RYAN D. WELLS , SANJEEV JAHAGIRDAR , INDER SODHI , JEREMY SHRALL , STEPHEN GUNTHER , DANIEL RAGLAND , NICHOLAS ADAMS
发明人： RYAN D. WELLS , SANJEEV JAHAGIRDAR , INDER SODHI , JEREMY SHRALL , STEPHEN GUNTHER , DANIEL RAGLAND , NICHOLAS ADAMS
CPC分类号： G06F1/28 , G06F1/24 , G06F1/26 , G06F1/3203 , G06F1/324 , G06F1/3296 , G06F9/448 , Y02D10/126 , Y02D10/172
摘要： According to one embodiment of the invention, an integrated circuit device at least one compute engine and a control unit. Coupled to the compute engine(s), the control unit is adapted to dynamically control an energy-efficient operating setting of at least one power management parameter for the integrated circuit device after execution of Basic Input/Output System (BIOS) has already completed.
摘要翻译： 根据本发明的一个实施例，集成电路装置至少包括一个计算引擎和一个控制单元。 耦合到计算引擎，控制单元适于在执行基本输入/输出系统（BIOS）已经完成之后动态地控制用于集成电路设备的至少一个功率管理参数的节能操作设置。
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公开(公告)号：US07149645B2
公开(公告)日：2006-12-12
申请号：US11024679
申请日：2004-12-30
摘要： A device and method for continually monitoring multiple thermal sensors located at hotspots across a processor. The sensors are connected to a sensor cycling and selection block located at a periphery of the die. The output from the sensor selection block is converted into a digital temperature code. Based on the digital temperature code, thermal events trigger various thermal controls. The thermal event triggers may be software-programmable, providing flexible temperature management.
摘要翻译： 一种用于连续监测位于热点处的多个热传感器的装置和方法。 传感器连接到位于模具周边的传感器循环和选择块。 传感器选择块的输出转换为数字温度代码。 基于数字温度代码，热事件触发各种热控制。 热事件触发器可以是软件可编程的，提供灵活的温度管理。
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17.发明申请Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit 有权用于动态地配置用于集成电路的热管理的工作点的方法，系统和装置公开(公告)号：US20050091548A1
公开(公告)日：2005-04-28
申请号：US10696469
申请日：2003-10-28
CPC分类号： G06F1/324 , G06F1/206 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and circuits to define a thermal operating mode for a integrated device by defining an operating voltage and a frequency range.
摘要翻译： 通过定义工作电压和频率范围来定义集成器件的热操作模式的方法和电路。
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18.发明申请公开(公告)号：US20120173904A1
公开(公告)日：2012-07-05
申请号：US13311475
申请日：2011-12-05
申请人： Sanjeev S. Jahagirdhar , Ryan Wells , Inder Sodhi
发明人： Sanjeev S. Jahagirdhar , Ryan Wells , Inder Sodhi
IPC分类号： G06F1/32
CPC分类号： G06F1/3293 , G06F1/32 , G06F1/3203 , G06F1/3206 , G06F1/3228 , G06F1/324 , G06F1/3243 , G06F1/3275 , G06F1/3287 , G06F1/329 , G06F1/3296 , G06F13/24 , Y02D10/126 , Y02D10/172 , Y02D50/20
摘要： A processor may determine the actual residency time of a non-core domain residing in a power saving state and based on the actual residency time the processor may determine an optimal power saving state (P-state) for the processor. In response to the non-core domain entering a power saving state, an interrupt generator (IG) may generate a first interrupt and the device drivers or an operating system may use the first interrupt to start a timer (first value). In response to the non-core domain exiting the power saving state, the IG may generate a second interrupt and the device drivers or an operating system may use the second interrupt to stop the timer (final value). The power management unit may use the final and the first value to determine the actual residency time.
摘要翻译： 处理器可以确定驻留在省电状态的非核心域的实际驻留时间，并且基于处理器可以确定处理器的最佳省电状态（P状态）的实际驻留时间。 响应于非核心域进入省电状态，中断发生器（IG）可以产生第一中断，并且设备驱动器或操作系统可以使用第一中断来启动定时器（第一值）。 响应于退出省电状态的非核心域，IG可以产生第二中断，并且设备驱动器或操作系统可以使用第二中断来停止定时器（最终值）。 电源管理单元可以使用最终和第一个值来确定实际的驻留时间。
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