公开(公告)号：US06864193B2

公开(公告)日：2005-03-08

申请号：US10379769

申请日：2003-03-05

Applicant: Chun-Li Chou ,  Hun-Jan Tao ,  Peng-Fu Hsu

Inventor： Chun-Li Chou ,  Hun-Jan Tao ,  Peng-Fu Hsu

IPC: C11D7/26 ,  C11D7/50 ,  C11D11/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L21/321 ,  H01L21/461

CPC classification number: H01L21/02063 ,  C11D7/261 ,  C11D7/263 ,  C11D7/265 ,  C11D7/267 ,  C11D7/5022 ,  C11D11/0047 ,  Y10S438/905 ,  Y10S438/906

Abstract: A composition and method for fabricating a semiconductor wafer containing copper is disclosed, which method includes plasma etching a dielectric layer from the surface of the wafer, plasma ashing a resist from the surface of the wafer, and cleaning the wafer surface by contacting same with a cleaning formulation, which includes the following components and their percentage by weight ranges shown: (a) from about 0.01 to 80% by weight organic solvent, (b) from about 0.01 to 30% by weight copper chelating agent, (c) from about 0.01 to 10% by weight copper inhibitor, and (d) from about 0.01 to 70% by weight water.

Abstract translation: 公开了一种用于制造含有铜的半导体晶片的组合物和方法，该方法包括从晶片的表面等离子体蚀刻介电层，等离子体从晶片的表面灰化抗蚀剂，以及通过使晶片表面与 清洁制剂，其包括以下组分及其重量百分比范围：（a）约0.01至80重量％的有机溶剂，（b）约0.01至30重量％的铜螯合剂，（c）约 0.01〜10重量％的铜抑制剂，（d）约0.01〜70重量％的水。

公开(公告)号：US08836038B2

公开(公告)日：2014-09-16

申请号：US12883241

申请日：2010-09-16

Applicant: Yong-Tian Hou ,  Peng-Fu Hsu ,  Jin Ying ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Tze-Liang Lee

Inventor： Yong-Tian Hou ,  Peng-Fu Hsu ,  Jin Ying ,  Kang-Cheng Lin ,  Kuo-Tai Huang ,  Tze-Liang Lee

IPC: H01L29/78 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L21/823842 ,  H01L21/28044 ,  H01L21/28088 ,  H01L21/823835 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7833 ,  H01L29/7843

Abstract: A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a first MOS device of a first conductivity type and a second MOS device of a second conductivity type opposite the first conductivity type. The first MOS device includes a first gate dielectric on a semiconductor substrate; a first metal-containing gate electrode layer over the first gate dielectric; and a silicide layer over the first metal-containing gate electrode layer. The second MOS device includes a second gate dielectric on the semiconductor substrate; a second metal-containing gate electrode layer over the second gate dielectric; and a contact etch stop layer having a portion over the second metal-containing gate electrode layer, wherein a region between the portion of the contact etch stop layer and the second metal-containing gate electrode layer is substantially free from silicon.

Abstract translation: 提供半导体结构及其形成方法。 半导体结构包括第一导电类型的第一MOS器件和与第一导电类型相反的第二导电类型的第二MOS器件。 第一MOS器件包括在半导体衬底上的第一栅极电介质; 在所述第一栅极电介质上的第一含金属的栅电极层; 以及位于第一含金属栅电极层上的硅化物层。 第二MOS器件包括半导体衬底上的第二栅极电介质; 在所述第二栅极电介质上方的第二含金属的栅电极层; 以及具有位于所述第二含金属栅电极层上的部分的接触蚀刻停止层，其中所述接触蚀刻停止层的所述部分和所述第二含金属栅电极层之间的区域基本上不含硅。

公开(公告)号：US08384159B2

公开(公告)日：2013-02-26

申请号：US12426477

申请日：2009-04-20

Applicant: Fong-Yu Yen ,  Cheng-Lung Hung ,  Peng-Fu Hsu ,  Vencent S. Chang ,  Yong-Tian Hou ,  Jin Ying ,  Hun-Jan Tao

Inventor： Fong-Yu Yen ,  Cheng-Lung Hung ,  Peng-Fu Hsu ,  Vencent S. Chang ,  Yong-Tian Hou ,  Jin Ying ,  Hun-Jan Tao

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/513 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/4966 ,  H01L29/518

Abstract: A semiconductor device is disclosed that includes: a substrate; a first dielectric layer formed over the substrate and formed of a first high-k material, the first high-k material selected from the group consisting of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfTiTaO, HfAlON, and HfZrO; a second dielectric layer formed over the first dielectric layer and formed of a second high-k material, the second high-k material being different than the first high-k material and selected from the group consisting of HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfTiTaO, HfAlON, and HfZrO; and a metal gate formed over the second dielectric layer. The first dielectric layer includes ions selected from the group consisting of N, O, and Si.

Abstract translation: 公开了一种半导体器件，包括：衬底; 形成在所述衬底上并由第一高k材料形成的第一介电层，所述第一高k材料选自HfO 2，HfSiO，HfSiON，HfTaO，HfTiO，HfTiTaO，HfAlON和HfZrO; 形成在所述第一介电层上并由第二高k材料形成的第二介电层，所述第二高k材料不同于所述第一高k材料并选自HfO 2，HfSiO，HfSiON，HfTaO， HfTiO，HfTiTaO，HfAlON和HfZrO; 以及形成在第二介电层上的金属栅极。 第一电介质层包括选自N，O和Si的离子。

公开(公告)号：US07939396B2

公开(公告)日：2011-05-10

申请号：US11450204

申请日：2006-06-09

Applicant: Peng-Fu Hsu ,  Jin Ying ,  Hun-Jan Tao

Inventor： Peng-Fu Hsu ,  Jin Ying ,  Hun-Jan Tao

IPC: H01L21/336

CPC classification number: H01L21/02312 ,  H01L21/02046 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/02238 ,  H01L21/0228 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/3141 ,  H01L21/31641 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

Abstract: A method of forming a semiconductor structure includes providing a semiconductor substrate, performing a hydrogen annealing to the semiconductor substrate, forming a base oxide layer after the step of hydrogen annealing, and forming a high-k dielectric layer on the base oxide layer.

Abstract translation: 形成半导体结构的方法包括提供半导体衬底，对半导体衬底进行氢退火，在氢退火步骤之后形成基底氧化物层，以及在基底氧化物层上形成高k电介质层。

公开(公告)号：US20100052077A1

公开(公告)日：2010-03-04

申请号：US12422378

申请日：2009-04-13

Applicant: Peng-Fu Hsu ,  Hsin-Chun Ko ,  Kang-Cheng Lin ,  Kuo-Tai Huang

Inventor： Peng-Fu Hsu ,  Hsin-Chun Ko ,  Kang-Cheng Lin ,  Kuo-Tai Huang

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L21/28194 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A high-k metal gate structure including a buffer layer and method of fabrication of such, is provided. The buffer layer may interpose an interface oxide layer and a high-k gate dielectric layer. In one embodiment, the buffer layer includes aluminum oxide. The buffer layer and the high-k gate dielectric layer may be formed in-situ using an atomic layer deposition (ALD) process.

Abstract translation: 提供了包括缓冲层的高k金属栅极结构及其制造方法。 缓冲层可以插入界面氧化物层和高k栅介质层。 在一个实施例中，缓冲层包括氧化铝。 可以使用原子层沉积（ALD）工艺原位形成缓冲层和高k栅介质层。

公开(公告)号：US07373941B2

公开(公告)日：2008-05-20

申请号：US10402593

申请日：2003-03-28

Applicant: Chun-Li Chou ,  Hun-Jan Tao ,  Peng-Fu Hsu

Inventor： Chun-Li Chou ,  Hun-Jan Tao ,  Peng-Fu Hsu

IPC: B08B3/12 ,  B08B7/04 ,  B08B5/00

CPC classification number: H01L21/67057 ,  B08B3/12 ,  Y10S134/902

Abstract: A cavitation cleaning system and method for using the same to remove particulate contamination from a substrate including providing at least one substrate immersed in a cleaning solution said cleaning solution contained in a cleaning solution container. The container further includes means for producing gaseous cavitation bubbles of ultrasound energy, said gaseous cavitation bubbles arranged to contact at least a portion of the at least one substrate; applying ultrasound energy to create gaseous cavitation bubbles to contact the substrate to remove adhering residual particles in a substrate surface cleaning process; and, recirculating the cleaning solution through a particulate filtering means.

Abstract translation: 一种空化清洁系统及其使用方法，用于从基材中除去颗粒污染物，包括提供浸入清洁溶液中的至少一种基材，所述清洗溶液中含有的清洁溶液包含在清洁溶液容器中。 所述容器还包括用于产生超声能量的气体空化气泡的装置，所述气体空化气泡布置成接触所述至少一个基底的至少一部分; 施加超声能量以产生气体气泡以接触基底以在基底表面清洁过程中除去粘附的残留颗粒; 并且通过颗粒过滤装置再循环清洁溶液。

公开(公告)号：US20070287199A1

公开(公告)日：2007-12-13

申请号：US11450204

申请日：2006-06-09

Applicant: Peng-Fu Hsu ,  Jin Ying ,  Hun-Jan Tao

Inventor： Peng-Fu Hsu ,  Jin Ying ,  Hun-Jan Tao

IPC: H01L21/00

CPC classification number: H01L21/02312 ,  H01L21/02046 ,  H01L21/02181 ,  H01L21/02194 ,  H01L21/02238 ,  H01L21/0228 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L21/3141 ,  H01L21/31641 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

Abstract: A method of forming a semiconductor structure includes providing a semiconductor substrate, performing a hydrogen annealing to the semiconductor substrate, forming a base oxide layer after the step of hydrogen annealing, and forming a high-k dielectric layer on the base oxide layer.

Abstract translation: 形成半导体结构的方法包括提供半导体衬底，对半导体衬底进行氢退火，在氢退火步骤之后形成基底氧化物层，以及在基底氧化物层上形成高k电介质层。

公开(公告)号：US20070272954A1

公开(公告)日：2007-11-29

申请号：US11441724

申请日：2006-05-27

Applicant: Kuang-Hsin Chen ,  Hsun-Chih Tsao ,  Jhi-Cherng Lu ,  Chuan-Ping Hou ,  Peng-Fu Hsu ,  Hung-Wei Chen ,  Di-Hong Lee

Inventor： Kuang-Hsin Chen ,  Hsun-Chih Tsao ,  Jhi-Cherng Lu ,  Chuan-Ping Hou ,  Peng-Fu Hsu ,  Hung-Wei Chen ,  Di-Hong Lee

IPC: H01L29/76

CPC classification number: H01L29/7851 ,  H01L29/66795

Abstract: A fin-FET device and a method for fabrication thereof both employ a bulk semiconductor substrate. A fin and an adjoining trough are formed within the bulk semiconductor substrate. The trough is partially backfilled with a deposited dielectric layer to form an exposed fin region and an unexposed fin region. A gate dielectric layer is formed upon the exposed fin region and a gate electrode is formed upon the gate dielectric layer. By employing a bulk semiconductor substrate the fin-FET device is fabricated cost effectively.

Abstract translation: 翅片FET器件及其制造方法都采用体半导体衬底。 在体半导体衬底内形成翅片和相邻的槽。 槽部分地用沉积的介电层回填以形成暴露的翅片区域和未曝光的翅片区域。 在暴露的散热片区域上形成栅极电介质层，在栅极电介质层上形成栅电极。 通过采用体半导体衬底，成本有效地制造了鳍式FET器件。

公开(公告)号：US20070196589A1

公开(公告)日：2007-08-23

申请号：US10598943

申请日：2005-06-01

Applicant: Peng Fu ,  Lingjie Guo ,  Xing Cheng

Inventor： Peng Fu ,  Lingjie Guo ,  Xing Cheng

IPC: C08G59/68

CPC classification number: G03F7/0382 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  G03F7/038 ,  G03F7/0755 ,  Y10T428/31612

Abstract: A material composition, which is used as a liquid resist, includes a first component comprising a monomer portion and at least one cationically polymerizable functional group, and a crosslinker reactive with the first component and comprising at least three cationically polymerizable functional groups. The material composition also includes a cationic photoinitiator. Upon exposure to UV light, the material composition crosslinks via cure to form a cured resist film that is the reaction product of the first component, the crosslinker, and the cationic photoinitiator. An article includes a substrate layer and a resist layer formed on the substrate layer from the material composition.

Abstract translation: 用作液体抗蚀剂的材料组合物包括包含单体部分和至少一种阳离子可聚合官能团的第一组分和与第一组分反应并包含至少三个可阳离子聚合的官能团的交联剂。 该材料组合物还包括阳离子光引发剂。 在暴露于UV光下时，材料组合物通过固化交联以形成固化的抗蚀剂膜，其是第一组分，交联剂和阳离子光引发剂的反应产物。 一种制品包括从该材料组合物形成在基底层上的基底层和抗蚀剂层。

公开(公告)号：US20070122749A1

公开(公告)日：2007-05-31

申请号：US11290866

申请日：2005-11-30

Applicant: Peng Fu ,  Lingjie Guo

Inventor： Peng Fu ,  Lingjie Guo

IPC: G03C5/00

CPC classification number: G03F7/0757 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

Abstract: A method of nanopatterning includes the steps of providing a resist film (12) and forming a pattern in the resist film (12). The resist film (12) includes a copolymer consisting of an organosilicone component and an organic component. An article (10) includes a substrate (14) and the resist film (12) disposed on the substrate (14). The copolymer of the organosilicone component and the organic component is sufficiently elastic, due to the presence of the organosilicone component, to be capable of resisting fracture and delamination during mold release. Furthermore, during pattern formation, the copolymer develops relatively low surface energy at an interface with the surface of a mold, as compared to conventional polymeric materials, and preferentially adheres to the substrate (14) rather than the mold, which provides for relatively easy mold release. The presence of the organosilicone component in the copolymer also allows the resist film (12) to exhibit excellent resistance to oxygen plasma etching.

Abstract translation: 纳米图案的方法包括提供抗蚀剂膜（12）并在抗蚀剂膜（12）中形成图案的步骤。 抗蚀膜（12）包括由有机硅组分和有机组分组成的共聚物。 制品（10）包括基板（14）和设置在基板（14）上的抗蚀膜（12）。 由于有机硅组分的存在，有机硅组分和有机组分的共聚物具有足够的弹性，能够抵抗脱模过程中的断裂和分层。 此外，在图案形成期间，与常规聚合物材料相比，共聚物在与模具表面的界面处产生相对低的表面能，并优先粘附到基材（14）而不是模具，其提供相对容易的模具 发布。 共聚物中有机硅组分的存在也允许抗蚀剂膜（12）表现出优异的耐氧等离子体蚀刻性。