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    Dynamic control of power consumption based on memory device activity
    11.
    发明授权
    Dynamic control of power consumption based on memory device activity 有权

    公开(公告)号：US10296062B2

    公开(公告)日：2019-05-21

    申请号：US15898586

    申请日：2018-02-18

    Applicant: Apple Inc.

    Inventor： Barak Rotbard ,  Assaf Shappir

    IPC: G06F1/26 ,  G06F1/32 ,  G06F3/06 ,  G11C5/14 ,  G11C16/30 ,  G06F1/3225

    Abstract: A memory controller includes an interface and a processor. The interface is configured to communicate with one or more memory devices that require an operation voltage. The memory devices are capable of obtaining the operation voltage either from a power supply external to the memory device or from respective charge pumps internal to the memory devices. The processor is configured to predict storage activity in the memory devices, and to cause the memory devices to select a source for the operation voltage between the power supply and the respective charge pumps in accordance with the predicted storage activity.

    MANAGEMENT OF PEAK POWER CONSUMED BY MULTIPLE MEMORY DEVICES
    12.
    发明申请
    MANAGEMENT OF PEAK POWER CONSUMED BY MULTIPLE MEMORY DEVICES 有权

    公开(公告)号：US20170220280A1

    公开(公告)日：2017-08-03

    申请号：US15008470

    申请日：2016-01-28

    Applicant: APPLE INC.

    Inventor： Barak Rotbard ,  Itay Sagron

    IPC: G06F3/06

    CPC classification number: G06F3/0625 ,  G06F3/064 ,  G06F3/0673 ,  G11C16/30

    Abstract: A controller includes an interface and a processor. The interface is configured to communicate with one or more memory devices that include multiple memory blocks. The processor is configured to hold information regarding power consumption of the memory blocks, to group at least some of the memory blocks into one or more storage groups, based on the information, such that the memory blocks in each storage group jointly consume less than a predefined power limit when the memory blocks in the storage group are applied a storage operation in parallel, and to apply the storage operation, in parallel, to the memory blocks in a selected storage group.

    Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block
    14.
    发明授权
    Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block 有权
    识别存储器块中的字线到基板和字线到字线的短路事件

    公开(公告)号：US09330783B1

    公开(公告)日：2016-05-03

    申请号：US14572818

    申请日：2014-12-17

    Applicant: APPLE INC.

    Inventor： Barak Rotbard ,  Avraham Poza Meir ,  Eyal Gurgi ,  Yael Shur ,  Barak Baum

    IPC: G11C29/00 ,  G11C29/02 ,  G11C16/26 ,  G11C16/14

    CPC classification number: G11C29/025 ,  G11C29/006 ,  G11C2029/1202

    Abstract: An apparatus includes a memory and a memory controller. The memory includes a memory block that includes memory cells connected by word lines. The memory controller is configured to store data in the memory cells, and to identify a suspected short-circuit event in the memory block by recognizing a deviation of a performance characteristic of at least a given word line in the memory block relative to the performance characteristic of remaining word lines in the memory block.

    Abstract translation: 一种装置包括存储器和存储器控制器。 该存储器包括一个包含通过字线连接的存储器单元的存储块。 存储器控制器被配置为将数据存储在存储器单元中，并且通过识别存储器块中的至少给定字线的性能特性相对于性能特性的偏差来识别存储器块中的可疑短路事件 剩余字线在存储器块中。

    Use of host system resources by memory controller
    15.
    发明授权
    Use of host system resources by memory controller 有权
    内存控制器使用主机系统资源

    公开(公告)号：US09317461B2

    公开(公告)日：2016-04-19

    申请号：US14452743

    申请日：2014-08-06

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Barak Rotbard

    IPC: G06F12/02 ,  G06F13/28 ,  G11C16/10

    CPC classification number: G06F13/28 ,  G06F12/0246 ,  G06F2212/1041 ,  G06F2212/7201 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7211 ,  G11C16/10 ,  Y02D10/13 ,  Y02D10/14

    Abstract: A method for data storage includes, in a system that includes a host having a host memory and a memory controller that is separate from the host and stores data for the host in a non-volatile memory including multiple analog memory cells, storing in the host memory information items relating to respective groups of the analog memory cells of the non-volatile memory. A command that causes the memory controller to access a given group of the analog memory cells is received from the host. In response to the command, a respective information item relating to the given group of the analog memory cells is retrieved from the host memory by the memory controller, and the given group of the analog memory cells is accessed using the retrieved information item.

    Abstract translation: 一种用于数据存储的方法包括在包括具有主机存储器的主机和与主机分离的存储器控​​制器并且将主机存储在包括多个模拟存储器单元的非易失性存储器中的数据的主机的系统中，存储在主机中 与非易失性存储器的模拟存储单元的各组相关的存储器信息项。 从主机接收使存储器控制器访问给定组的模拟存储器单元的命令。 响应该命令，由存储器控制器从主机存储器检索与模拟存储器单元的给定组相关的相应信息项，并且使用检索到的信息项来访问给定的模拟存储单元组。

    HIERARCHICAL DATA STORAGE SYSTEM
    16.
    发明申请
    HIERARCHICAL DATA STORAGE SYSTEM 审中-公开
    分层数据存储系统

    公开(公告)号：US20150081973A1

    公开(公告)日：2015-03-19

    申请号：US14548664

    申请日：2014-11-20

    Applicant: Apple Inc.

    Inventor： Michael Shachar ,  Barak Rotbard ,  Oren Golov ,  Uri Perlmutter ,  Dotan Sokolov ,  Julian Vlaiko ,  Yair Schwartz

    IPC: G06F12/12

    CPC classification number: G06F12/12 ,  G06F3/0628 ,  G06F3/0683 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1657 ,  G06F13/1668 ,  G06F13/18 ,  G06F2212/1024 ,  G06F2212/7208

    Abstract: A data storage system includes a plurality of non-volatile memory devices arranged in one or more sets, a main controller and one or more processors. The main controller is configured to accept commands from a host and to convert the commands into recipes. Each recipe includes a list of multiple memory operations to be performed sequentially in the non-volatile memory devices belonging to one of the sets. Each of the processors is associated with a respective set of the non-volatile memory devices, and is configured to receive one or more of the recipes from the main controller and to execute the memory operations specified in the received recipes in the non-volatile memory devices belonging to the respective set.

    Abstract translation: 数据存储系统包括以一个或多个集合排列的多个非易失性存储器件，主控制器和一个或多个处理器。 主控制器配置为接受来自主机的命令，并将命令转换为配方。 每个配方包括要在属于其中一个组的非易失性存储器件中顺序执行的多个存储器操作的列表。 每个处理器与相应的一组非易失性存储器设备相关联，并且被配置为从主控制器接收一个或多个配方并且执行在非易失性存储器中接收的配方中指定的存储器操作 属于相应集合的设备。

    Use of Host System Resources by Memory Controller
    17.
    发明申请
    Use of Host System Resources by Memory Controller 审中-公开
    内存控制器使用主机系统资源

    公开(公告)号：US20140344498A1

    公开(公告)日：2014-11-20

    申请号：US14452743

    申请日：2014-08-06

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Barak Rotbard

    IPC: G06F13/28

    CPC classification number: G06F13/28 ,  G06F12/0246 ,  G06F2212/1041 ,  G06F2212/7201 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7211 ,  G11C16/10 ,  Y02D10/13 ,  Y02D10/14

    Abstract: A method for data storage includes, in a system that includes a host having a host memory and a memory controller that is separate from the host and stores data for the host in a non-volatile memory including multiple analog memory cells, storing in the host memory information items relating to respective groups of the analog memory cells of the non-volatile memory. A command that causes the memory controller to access a given group of the analog memory cells is received from the host. In response to the command, a respective information item relating to the given group of the analog memory cells is retrieved from the host memory by the memory controller, and the given group of the analog memory cells is accessed using the retrieved information item.

    Abstract translation: 一种用于数据存储的方法包括在包括具有主机存储器的主机和与主机分离的存储器控​​制器并且将主机存储在包括多个模拟存储器单元的非易失性存储器中的数据的主机的系统中，存储在主机中 与非易失性存储器的模拟存储单元的各组相关的存储器信息项。 从主机接收使存储器控制器访问给定组的模拟存储器单元的命令。 响应该命令，由存储器控制器从主机存储器检索与模拟存储器单元的给定组相关的相应信息项，并且使用检索到的信息项来访问给定的模拟存储单元组。

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