公开(公告)号：US20160148805A1

公开(公告)日：2016-05-26

申请号：US14555429

申请日：2014-11-26

Applicant: ASM IP Holding B.V.

Inventor： Bert Jongbloed ,  Dieter Pierreux ,  Werner Knaepen

IPC: H01L21/02 ,  H01L21/308

CPC classification number: H01L21/02178 ,  H01L21/0228

Abstract: A process for depositing aluminum oxynitride (AlON) is disclosed. The process comprises subjecting a substrate to temporally separated exposures to an aluminum precursor and a nitrogen precursor to form an aluminum and nitrogen-containing compound on the substrate. The aluminum and nitrogen-containing compound is subsequently exposed to an oxygen precursor to form AlON. The temporally separated exposures to an aluminum precursor and a nitrogen precursor, and the subsequent exposure to an oxygen precursor together constitute an AlON deposition cycle. A plurality of AlON deposition cycles may be performed to deposit an AlON film of a desired thickness. The deposition may be performed in a batch process chamber, which may accommodate batches of 25 or more substrates. The deposition may be performed without exposure to plasma.

Abstract translation: 公开了一种沉积氮氧化铝（AlON）的方法。 该方法包括使基底经历时间上分离的暴露于铝前体和氮前体，以在基底上形成含铝和氮的化合物。 随后将铝和含氮化合物暴露于氧前体以形成AlON。 时间上分离的暴露于铝前体和氮前体，随后暴露于氧前体一起构成了AlON沉积循环。 可以执行多个AlON沉积循环以沉积所需厚度的AlON膜。 沉积可以在间歇处理室中进行，其可以容纳25个或更多个基底的批次。 可以在不暴露于等离子体的情况下进行沉积。

公开(公告)号：US20240425984A1

公开(公告)日：2024-12-26

申请号：US18748983

申请日：2024-06-20

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Quentin Nikitas Nicolas Lionel Eric Tricas ,  Werner Knaepen ,  Alessandro Viva

IPC: C23C16/455 ,  C23C16/44 ,  C23C16/52

Abstract: A method of forming a layer of a material on one or more substrates by ALD is disclosed. Embodiments of the presently described method comprise performing a plurality of deposition cycles comprising at least two precursors pulses with intervening purge pulses to form the layer of the material on the one or more substrates. During each deposition cycle, a ratio of the process chamber pressure during each precursor pulse of the at least two precursor pulses to the process chamber pressure during an intervening purge pulse is equal or different from one another.

公开(公告)号：US12040229B2

公开(公告)日：2024-07-16

申请号：US17989875

申请日：2022-11-18

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC: H01L21/768 ,  G11C5/02 ,  G11C5/06 ,  H01L23/538 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L21/76879 ,  G11C5/025 ,  G11C5/06 ,  H01L21/76802 ,  H01L23/5384 ,  H10B41/27 ,  H10B43/27

Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20240229237A9

公开(公告)日：2024-07-11

申请号：US18491546

申请日：2023-10-20

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Theodorus G.M. Oosterlaken

IPC: C23C16/455

CPC classification number: C23C16/45527 ,  C23C16/45544

Abstract: A method and system for depositing a material on one or more substrates by atomic layer deposition. The method comprising a step of performing a pulse (1) of a precursor of said material, wherein at least one of the average flow rate (f) and the average partial pressure (r) of said precursor over a first half (2) of the pulse (1) is higher than over a second half (3) of the pulse (1).

公开(公告)号：US20240191351A1

公开(公告)日：2024-06-13

申请号：US18530444

申请日：2023-12-06

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux

IPC: C23C16/44 ,  C23C16/30 ,  C23C16/34 ,  C23C16/455 ,  C23C16/52 ,  H01L21/02

CPC classification number: C23C16/4412 ,  C23C16/308 ,  C23C16/345 ,  C23C16/45527 ,  C23C16/45544 ,  C23C16/52 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0228

Abstract: A substrate processing system and a method for forming a layer on one or more substrates is disclosed. Embodiments, of the recently described substrate processing system comprise a process chamber, a precursor storage module, a pump, a pump valve and a controller configured to control the provision of the precursor flow to the process chamber.

公开(公告)号：US20230223258A1

公开(公告)日：2023-07-13

申请号：US18153282

申请日：2023-01-11

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Kelly Houben ,  Steven Van Aerde ,  Wilco Verweij ,  Bert Jongbloed ,  Charles Dezelah

IPC: H01L21/02 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  C30B25/18

CPC classification number: H01L21/0262 ,  H01L21/02532 ,  H01L21/02661 ,  C30B25/165 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  C30B25/186

Abstract: A method and a wafer processing furnace for forming an epitaxial stack on a plurality of substrates is provided. In a preferred embodiment, the method comprises providing plurality of substrates to a process chamber. A plurality of deposition cycles are executed, thereby forming the epitaxial stack on the plurality of substrates. The epitaxial comprises a plurality of epitaxial pairs, each pair comprising a first epitaxial layer and a second epitaxial layer. The deposition cycle comprises a first deposition pulse and a second deposition pulse. The first deposition pulse comprises a provision of a first reaction gas mixture to the process chamber, thereby forming the first epitaxial layer and the second deposition pulse comprises a provision of a second reaction gas mixture to the process chamber, thereby forming the second epitaxial layer

公开(公告)号：US20230175136A1

公开(公告)日：2023-06-08

申请号：US18101666

申请日：2023-01-26

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Werner Knaepen ,  Bert Jongbloed ,  Jeroen Fluit

IPC: C23C16/48 ,  C23C16/455 ,  C23C16/44 ,  C23C16/458

CPC classification number: C23C16/48 ,  C23C16/45553 ,  C23C16/4405 ,  C23C16/4583

Abstract: The disclosure relates to a substrate processing apparatus, comprising: a first reactor constructed and arranged to process a rack with a plurality of substrates therein; a second reactor constructed and arranged to process a substrate; and, a substrate transfer device constructed and arranged to transfer substrates to and from the first and second reactor. The second reactor may be provided with an illumination system constructed and arranged to irradiate ultraviolet radiation within a range from 100 to 500 nanometers onto a top surface of at least a substrate in the second reactor.

公开(公告)号：US11594450B2

公开(公告)日：2023-02-28

申请号：US16995281

申请日：2020-08-17

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Steven van Aerde ,  Bert Jongbloed

IPC: H01L21/768 ,  H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  H01L23/538 ,  G11C5/02

Abstract: A method for forming a structure with a hole on a substrate is disclosed. The method may comprise: depositing a first structure on the substrate; etching a first part of the hole in the first structure; depositing a plug fill in the first part of the hole; depositing a second structure on top of the first structure; etching a second part of the hole substantially aligned with the first part of the hole in the second structure; and, etching the plug fill of the first part of the hole and thereby opening up the hole by dry etching. In this way 3-D NAND device may be provided.

公开(公告)号：US20230008131A1

公开(公告)日：2023-01-12

申请号：US17810773

申请日：2022-07-05

Applicant: ASM IP Holding, B.V.

Inventor： Dieter Pierreux ,  Theodorus G.M Oosterlaken ,  Herbert Terhorst ,  Lucian Jdira ,  Bert Jongbloed

IPC: C23C16/44 ,  C23C16/34 ,  C23C16/52 ,  C23C16/455

Abstract: A chemical vapor deposition furnace for depositing silicon nitride films is disclosed. The furnace having a process chamber elongated in a substantially vertical direction and a wafer boat for supporting a plurality of wafers in the process chamber. A process gas injector inside the process chamber is provided with a plurality of vertically spaced gas injection holes to provide gas introduced at a feed end in an interior of the process gas injector to the process chamber. A valve system connected to the feed end of the process gas injector is being constructed and arranged to connect a source of a silicon precursor and a nitrogen precursor to the feed end for depositing silicon nitride layers. The valve system may connect the feed end of the process gas injector to a cleaning gas system to provide a cleaning gas to remove silicon nitride from the process gas injector and/or the processing chamber.

公开(公告)号：US11501968B2

公开(公告)日：2022-11-15

申请号：US17093224

申请日：2020-11-09

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Anna Trovato ,  Kelly Houben ,  Steven van Aerde ,  Bert Jongbloed ,  Wilco A. Verweij

IPC: H01L21/02 ,  H01L29/66 ,  H01L29/78 ,  H01L21/331 ,  H01L27/092 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L21/311 ,  H01L21/285

Abstract: Method for filling a gap, comprising providing in a deposition chamber a semiconductor substrate having a gap, wherein a bottom of the gap includes a crystalline semiconducting material and wherein a side wall of the gap includes an amorphous material; depositing a silicon precursor in the gap.