公开(公告)号：US4851370A

公开(公告)日：1989-07-25

申请号：US138633

申请日：1987-12-28

申请人： Raymond H. Doklan ,  Edward P. Martin, Jr. ,  Pradip K. Roy ,  Scott F. Shive ,  Ashok K. Sinha

发明人： Raymond H. Doklan ,  Edward P. Martin, Jr. ,  Pradip K. Roy ,  Scott F. Shive ,  Ashok K. Sinha

IPC分类号： H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L21/28185 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02271 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/28238 ,  H01L21/3144 ,  H01L21/31662 ,  H01L29/513 ,  H01L29/518

摘要： Low defect density oxides suitable for use as thin gate oxides or in charge storage capacitors are described. First and second layers are formed on a substrate with misaligned defect structures. A third layer is then grown by diffusing a species through the first and second layers to the substrate. The species reacts with the substrate. The low defect density results from the misaligned defect structure of the first and second layers. In one embodiment, the first and second layers are grown and deposited oxides, respectively. The third layer is grown by diffusing oxygen through the first two layers and the interface between the first and second layers acts as a sink trapping defects. The oxide silicon interface has desirable characteristics because the oxide grows in near equilibrium conditions.

公开(公告)号：US4321280A

公开(公告)日：1982-03-23

申请号：US856468

申请日：1977-12-01

申请人： Pradip K. Roy ,  Alonzo H. R. Feldbrugge ,  David P. Bresnahan

发明人： Pradip K. Roy ,  Alonzo H. R. Feldbrugge ,  David P. Bresnahan

IPC分类号： A23J3/00 ,  A23J3/28

CPC分类号： A23J3/285 ,  A23J3/28 ,  Y10S426/802 ,  Y10T29/49833

摘要： A process for preparing textured oil seed protein products is provided. The process enables the use of fat-containing oil seeds without the need for removing the fat prior to processing. According to the process, an aqueous dispersion of oil seed protein is concentrated under conditions effective to prevent any significant protein denaturation while allowing sufficient removal of water to obtain a viscous dispersion having a solids concentration of greater than 30% by weight, and is shaped by expressing the dispersion through a die and into an aqueous bath. According to a preferred embodiment, the oil seed material comprises full fat soybeans. Both fibers and films can be formed.

摘要翻译： 提供了一种制备织构油籽蛋白产品的方法。 该方法能够使用含脂肪的油籽，而不需要在加工之前除去脂肪。 根据该方法，油状种子蛋白质的水性分散体在有效地防止任何显着的蛋白质变性同时允许充分除去水以获得固体浓度大于30重量％的粘性分散体的条件下浓缩，并且由 通过模头表达分散体并进入水浴中。 根据优选的实施方案，油料种子材料包括全脂大豆。 可以形成纤维和薄膜。

公开(公告)号：US4260428A

公开(公告)日：1981-04-07

申请号：US127358

申请日：1980-03-05

申请人： Pradip K. Roy

发明人： Pradip K. Roy

IPC分类号： H01L31/04 ,  H01L31/0224 ,  H01L31/0336

CPC分类号： H01L31/022425 ,  H01L31/03365 ,  Y02E10/50

摘要： A photovoltaic cell having improved stability and lifetime comprising a cadmium sulfide film, an overlying copper sulfide film and deposited on the copper sulfide film, a film selected from the group consisting of a film of chromium, a film of chromium having deposited thereon a film of copper, a film of copper having deposited thereon a film of chromium and a film of an admixture of chromium and copper. A method for making such a photovoltaic cell is also disclosed.

摘要翻译： 一种具有改善的稳定性和寿命的光伏电池，其包含硫化镉膜，覆盖的硫化铜膜并沉积在硫化铜膜上，选自铬的膜，其上沉积有铬的膜， 铜，其上沉积有铬的膜和铬和铜的混合物的膜的铜膜。 还公开了制造这种光伏电池的方法。

公开(公告)号：US08864859B2

公开(公告)日：2014-10-21

申请号：US11998319

申请日：2007-11-28

申请人： Pradip K. Roy ,  Manish Deopura ,  Sudhanshu Misra

发明人： Pradip K. Roy ,  Manish Deopura ,  Sudhanshu Misra

IPC分类号： B24D3/00 ,  B24D11/00 ,  B24D18/00 ,  C09K3/14 ,  B24B1/00 ,  B24B37/26 ,  B24D7/14

CPC分类号： B24B37/26 ,  B24D7/14 ,  B24D11/04

摘要： The present application relates to polishing pads for chemical mechanical planarization (CMP) of substrates, and methods of fabrication and use thereof. The pads described in this invention are customized to polishing specifications where specifications include (but not limited to) to the material being polished, chip design and architecture, chip density and pattern density, equipment platform and type of slurry used. These pads can be designed with a specialized polymeric nano-structure with a long or short range order which allows for molecular level tuning achieving superior thermo-mechanical characteristics. More particularly, the pads can be designed and fabricated so that there is both uniform and nonuniform spatial distribution of chemical and physical properties within the pads. In addition, these pads can be designed to tune the coefficient of friction by surface engineering, through the addition of solid lubricants, and creating low shear integral pads having multiple layers of polymeric material which form an interface parallel to the polishing surface. The pads can also have controlled porosity, embedded abrasive, novel grooves on the polishing surface, for slurry transport, which are produced in situ, and a transparent region for endpoint detection.

摘要翻译： 本申请涉及用于基板的化学机械平面化（CMP）的抛光垫及其制造和使用方法。 本发明中描述的焊盘定制为抛光规格，其中规格包括（但不限于）被抛光材料，芯片设计和结构，芯片密度和图案密度，设备平台和使用的浆料类型。 这些垫可以设计成具有长或短范围顺序的专门的聚合物纳米结构，其允许分子水平调节实现优异的热机械特性。 更具体地，可以设计和制造焊盘，使得焊盘内的化学和物理性质均匀和不均匀的空间分布。 此外，这些垫可以被设计成通过表面工程，通过添加固体润滑剂来调节摩擦系数，并且产生具有形成与抛光表面平行的界面的多层聚合材料的低剪切整体垫。 焊盘还可以具有受控的孔隙率，嵌入式研磨剂，抛光表面上的新型凹槽，用于原位生产的浆料输送，以及用于端点检测的透明区域。

公开(公告)号：US07377840B2

公开(公告)日：2008-05-27

申请号：US10897192

申请日：2004-07-21

申请人： Manish Deopura ,  Hem M. Vaidya ,  Pradip K. Roy

发明人： Manish Deopura ,  Hem M. Vaidya ,  Pradip K. Roy

IPC分类号： B24D11/00

CPC分类号： B24B37/26 ,  B24D15/04 ,  B24D18/0009 ,  B29C33/3842 ,  B29C33/405 ,  B29C33/424 ,  B29C33/565 ,  B29K2083/00 ,  B33Y80/00

摘要： Methods for producing in-situ grooves in CMP pads are provided. In general, the methods for producing in-situ grooves comprise the steps of patterning a silicone lining, placing the silicone lining in, or on, a mold, adding CMP pad material to the silicone lining, and allowing the CMP pad to solidify. CMP pads comprising novel groove designs are also described. For example, described here are CMP pads comprising concentric circular grooves and axially curved grooves, reverse logarithmic grooves, overlapping circular grooves, lassajous groves, double spiral grooves, and multiply overlapping axially curved grooves. The CMP pads may be made from polyurethane, and the grooves produced therein may be made by a method from the group consisting of silicone lining, laser writing, water jet cutting, 3-D printing, thermoforming, vacuum forming, micro-contact printing, hot stamping, and mixtures thereof.

公开(公告)号：US07169714B2

公开(公告)日：2007-01-30

申请号：US10986984

申请日：2004-11-12

申请人： Samir Chaudhry ,  Pradip K. Roy

发明人： Samir Chaudhry ,  Pradip K. Roy

IPC分类号： H01L21/469

CPC分类号： H01L29/66666 ,  C30B29/06 ,  C30B33/005 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28167 ,  H01L21/28194 ,  H01L21/31662 ,  H01L21/32105 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7827

摘要： A method for forming an oxide layer on a vertical, non-planar semiconductor surface provides a low stress oxide layer having a pristine interface characterized by a roughness of less than 3 angstroms. The oxide layer includes a portion that is substantially amorphous and notably dense. The oxide layer is a graded growth oxide layer including a composite of a first oxide portion formed at a relatively low temperature below the viscoelastic temperature of the oxide film and a second oxide portion formed at a relatively high temperature above the viscoelastic temperature of the oxide film. The process for forming the oxide layer includes thermally oxidizing at a first temperature below the viscoelastic temperature of the film, and slowly ramping up the temperature to a second temperature above the viscoelastic temperature of the film and heating at the second temperature. After the second, high temperature oxidation above the viscoelastic temperature, the structure is then slowly cooled under gradual, modulated cooling conditions.

摘要翻译： 在垂直非平面半导体表面上形成氧化物层的方法提供了具有粗糙度小于3埃的原始界面的低应力氧化物层。 氧化物层包括基本无定形且特别密集的部分。 氧化物层是分级生长氧化物层，其包括在低于氧化膜的粘弹性温度的较低温度下形成的第一氧化物部分和在高于氧化膜的粘弹性温度的较高温度下形成的第二氧化物部分的复合物 。 用于形成氧化物层的方法包括在低于膜的粘弹性温度的第一温度下热氧化，并将温度缓慢升高到高于膜的粘弹性温度的第二温度并在第二温度下加热。 第二次，高于粘弹性温度的高温氧化，然后在逐渐调节的冷却条件下缓慢冷却结构。

公开(公告)号：US06674151B1

公开(公告)日：2004-01-06

申请号：US09379055

申请日：1999-08-23

申请人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

发明人： Sundar S. Chetlur ,  Pradip K. Roy ,  Anthony S. Oates ,  Sidhartha Sen ,  Jonathan Z-N. Zhou

IPC分类号： H01L29167

CPC分类号： H01L21/28211 ,  H01L21/28176 ,  H01L21/3003 ,  H01L21/76843

摘要： A semiconductor device having trap sites passivated with deuterium has enhanced immunity to hot carrier effects. The trap sites which are passivated with deuterium are encapsulated beneath a barrier film and are therefore resistant to having the deuterium diffuse away from the trap sites during subsequent high temperature processing operations.

摘要翻译： 具有用氘钝化的捕获位点的半导体器件增强了对热载体效应的免疫力。 用氘钝化的捕集点被封装在阻挡膜下面，因此在随后的高温处理操作期间，氘能够使氘扩散离开捕获位点。

公开(公告)号：US06548422B1

公开(公告)日：2003-04-15

申请号：US09966779

申请日：2001-09-27

申请人： Pradip K. Roy ,  David C. Brady ,  Carlos M. Chacon

发明人： Pradip K. Roy ,  David C. Brady ,  Carlos M. Chacon

IPC分类号： H01L2348

CPC分类号： H01L21/28185 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/28202 ,  H01L21/28211 ,  H01L29/513 ,  H01L29/518 ,  H01L2924/0002 ,  H01L2924/00

摘要： A transistor gate dielectric structure includes an oxide layer formed on a substrate, a superjacent nitride layer and a transition layer interposed therebetween. The presence of the transition layer alleviates stress between the nitride and oxide layers and minimizes any charge trapping sites between the nitride and oxide layers. The transition layer includes both nitrogen and oxygen as components. The method for forming the structure includes forming the transition layer using a remote nitridation reactor at a sufficiently low temperature such that virtually no nitrogen reaches the interface formed between the oxide layer and the substrate. The oxide layer/substrate interface is relatively pristine and defect-free. In an exemplary embodiment, the oxide layer may be a graded structure formed using two distinct processing operations, a first operation at a relatively low temperature and a final operation at a temperature above the viscoelastic temperature of the oxide film.

摘要翻译： 晶体管栅极电介质结构包括形成在衬底上的氧化物层，超临界氮化物层和介于其间的过渡层。 过渡层的存在减轻氮化物和氧化物层之间的应力，并使氮化物和氧化物层之间的任何电荷俘获位置最小化。 过渡层包括氮和氧作为组分。 形成结构的方法包括在足够低的温度下使用远程氮化反应器形成过渡层，使得实际上没有氮到达氧化物层和衬底之间形成的界面。 氧化物层/衬底界面相对原始且无缺陷。 在示例性实施例中，氧化物层可以是使用两种不同的加工操作形成的渐变结构，在较低温度下的第一操作和在高于氧化膜的粘弹性温度的温度下的最终操作。

公开(公告)号：US06391668B1

公开(公告)日：2002-05-21

申请号：US09562346

申请日：2000-05-01

申请人： Carlos M. Chacon ,  Sundar S. Chetlur ,  Brian E. Harding ,  Minesh A. Patel ,  Pradip K. Roy

发明人： Carlos M. Chacon ,  Sundar S. Chetlur ,  Brian E. Harding ,  Minesh A. Patel ,  Pradip K. Roy

IPC分类号： H01L2166

CPC分类号： H01L22/14

摘要： The present invention provides a method of determining a trap density of a semiconductor substrate/dielectric interface. In one embodiment, the method comprises measuring a current within a semiconductor substrate resulting from a flow of carriers from traps located near the interface, wherein the measured current is a function of the number of traps located at the interface, and determining the trap density as a function of the measured current.

摘要翻译： 本发明提供一种确定半导体衬底/电介质界面的阱密度的方法。 在一个实施例中，该方法包括测量由位于接口附近的陷阱的载流子导致的半导体衬底内的电流，其中测量的电流是位于界面处的陷阱的数量的函数，并且将陷阱密度确定为 测量电流的函数。

公开(公告)号：US06323078B1

公开(公告)日：2001-11-27

申请号：US09418106

申请日：1999-10-14

申请人： Siddhartha Bhowmik ,  Sailesh M. Merchant ,  Pradip K. Roy ,  Sidhartha Sen

发明人： Siddhartha Bhowmik ,  Sailesh M. Merchant ,  Pradip K. Roy ,  Sidhartha Sen

IPC分类号： H01L218234

CPC分类号： H01L28/40

摘要： The present invention provides a method of forming a metal oxide metal (MOM) capacitor on a substrate, such as a silicon substrate, of a semiconductor wafer in a rapid thermal process (RTP) machine. The MOM capacitor is fabricated by forming a metal layer on the semiconductor substrate. The metal layer is then subjected to a first rapid thermal process in a substantially inert but nitrogen-free atmosphere that consumes a portion of the metal layer to form a first metal electrode layer and a silicide layer between the first metal electrode and the semiconductor substrate. The semiconductor wafer is then subjected to a second rapid thermal process. During this process, the remaining portion of the metal layer is oxidized to form a metal oxide on the first metal electrode, which serves as the dielectric layer of the MOM capacitor. Following the formation of the dielectric layer, a second metal electrode layer is then conventionally formed on the metal oxide, which completes the formation of the MOM capacitor. Preferably, the first electrode layer and the metal oxide layer are formed in a single RTP machine.

摘要翻译： 本发明提供了一种在快速热处理（RTP）机器中在半导体晶片的衬底（例如硅衬底）上形成金属氧化物金属（MOM）电容器的方法。 通过在半导体衬底上形成金属层来制造MOM电容器。 然后在基本惰性但无氮的气氛中对金属层进行第一快速热处理，其消耗金属层的一部分以在第一金属电极和半导体衬底之间形成第一金属电极层和硅化物层。 然后对半导体晶片进行第二快速热处理。 在该过程中，金属层的剩余部分被氧化，在作为MOM电容器的电介质层的第一金属电极上形成金属氧化物。 在形成电介质层之后，通常在金属氧化物上形成第二金属电极层，从而完成MOM电容器的形成。 优选地，第一电极层和金属氧化物层在单个RTP机器中形成。