公开(公告)号：US09230655B2

公开(公告)日：2016-01-05

申请号：US14135881

申请日：2013-12-20

Applicant: Apple Inc.

Inventor： Moti Teitel ,  Maya Barkon ,  Micha Anholt ,  Naftali Sommer

IPC: G11C16/04 ,  G11C16/08 ,  G11C16/26 ,  G11C7/10 ,  G11C11/56 ,  G11C16/34 ,  G11C16/10

CPC classification number: G11C11/5628 ,  G11C7/1006 ,  G11C11/56 ,  G11C11/5642 ,  G11C11/5671 ,  G11C16/08 ,  G11C16/10 ,  G11C16/107 ,  G11C16/26 ,  G11C16/3427

Abstract: A method for data storage includes, in a first programming phase, storing first data in a group of memory cells by programming the memory cells in the group to a set of initial programming levels. In a subsequent second programming phase, second data is stored in the group by identifying the memory cells in the group that were programmed in the first programming phase to respective levels in a predefined partial subset of the initial programming levels, and programming only the identified memory cells with the second data, so as to set at least some of the identified memory cells to one or more additional programming levels that are different from the initial programming levels. The memory cells to which the second data was programmed are recognized by reading only a partial subset of the first data. The second data is read from the recognized memory cells.

Abstract translation: 一种用于数据存储的方法包括在第一编程阶段中通过将组中的存储器单元编程为一组初始编程级别来将第一数据存储在一组存储器单元中。 在随后的第二编程阶段，通过将在第一编程阶段中编程的组中的存储器单元识别为初始编程级的预定义部分子集中的相应级别，并且仅编程所识别的存储器，将第二数据存储在组中 具有第二数据的单元，以便将所识别的存储器单元中的至少一些设置为与初始编程电平不同的一个或多个附加编程电平。 通过仅读取第一数据的部分子集来识别第二数据被编程到的存储器单元。 从识别的存储器单元读取第二数据。

公开(公告)号：US09136015B2

公开(公告)日：2015-09-15

申请号：US13908041

申请日：2013-06-03

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Eyal Gurgi ,  Barak Baum ,  Moshe Neerman ,  Moti Teitel

IPC: G11C29/00 ,  G11C29/02 ,  G06F11/10 ,  G11C29/42 ,  G11C11/56 ,  G11C16/00

CPC classification number: G11C29/021 ,  G06F11/1072 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/00 ,  G11C29/028 ,  G11C29/42

Abstract: A method, in a memory including multiple analog memory cells, includes segmenting a group of the memory cells into a common section and at least first and second dedicated sections. Each dedicated section corresponds to a read threshold that is used for reading a data page to be stored in the group. Data to be stored in the group is jointly balanced over a union of the common section and the first dedicated section, and over the union of the common section and the second dedicated section, to create a balanced page such that for each respective read threshold an equal number of memory cells will be programmed to assume programming levels that are separated by the read threshold. The balanced page is stored to the common and dedicated sections, and the read thresholds are adjusted based on detecting imbalance between data values in readout results of the balanced page.

Abstract translation: 一种在包括多个模拟存储器单元的存储器中的方法包括将一组存储器单元分成公共部分和至少第一和第二专用部分。 每个专用部分对应于用于读取要存储在组中的数据页的读取阈值。 要存储在组中的数据通过公共部分和第一专用部分的并集，并且在公共部分和第二专用部分的联合之间共同平衡，以创建平衡页面，使得对于每个相应的读取阈值 相同数量的存储器单元将被编程为假设由读取阈值分开的编程电平。 平衡页面存储到公共和专用部分，并且基于检测平衡页面的读出结果中的数据值之间的不平衡来调整读取阈值。

公开(公告)号：US08954831B2

公开(公告)日：2015-02-10

申请号：US14336066

申请日：2014-07-21

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer

IPC: G06F11/00 ,  H03M13/00 ,  G06F11/10

CPC classification number: G06F11/10 ,  G06F11/1012 ,  H03M13/114 ,  H03M13/118 ,  H03M13/6393

Abstract: A method includes accepting input including at least part of a codeword that has been encoded by an ECC defined by a set of parity check equations. The codeword includes data bits and parity bits. A decoding process is applied to the codeword using the data bits and only a first partial subset of parity bits in the input, and using only a second partial subset of equations. Upon a failure to decode the codeword using the partial subsets, the codeword is re-decoded using the data bits and all parity bits in the input, and using all equations. The set of parity check equations is defined such that any parity bit in the codeword appears in multiple equations, and any parity bit in the first partial subset of the parity bits appears in a plurality of equations in the second partial subset of the equations.

Abstract translation: 一种方法包括接受输入，该输入包括已由由奇偶校验方程组确定的ECC编码的码字的至少一部分。 码字包括数据位和奇偶校验位。 使用数据位和仅输入中的奇偶校验位的第一部分子集，并且仅使用方程的第二部分子集，将解码处理应用于码字。 在使用部分子集解码码字失败时，使用输入中的数据位和所有奇偶校验位，并使用所有方程对码字进行重新解码。 定义奇偶校验方程组，使得码字中的任何奇偶校验位出现在多个等式中，并且奇偶校验位的第一部分子集中的任何奇偶校验位出现在等式的第二部分子集中的多个等式中。

公开(公告)号：US08914710B2

公开(公告)日：2014-12-16

申请号：US13628321

申请日：2012-09-27

Applicant: Apple Inc.

Inventor： Tomer Ish-Shalom ,  Micha Anholt

IPC: H03M13/00

CPC classification number: H03M13/1111 ,  H03M13/1117 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/1154

Abstract: A method includes, in a decoder of an Error Correction Code (ECC), maintaining only aggregated information regarding a set of messages, a function of which is to be reported from a first node to a second node of the decoder. The function of the set is determined and reported using the aggregated information. After reporting the function, one of the messages in the set is replaced with a new message. The aggregated information is updated to reflect the set having the new message, and the function of the set having the new message is determined and reported using the updated aggregated information.

Abstract translation: 一种方法包括在纠错码（ECC）的解码器中维护关于一组消息的聚合信息，其功能将从解码器的第一节点报告给第二节点。 使用聚合信息确定并报告集合的功能。 报告功能后，集合中的消息之一将被替换为新消息。 聚合信息被更新以反映具有新消息的集合，并且使用更新的聚合信息确定并报告具有新消息的集合的功能。

公开(公告)号：US20140149820A1

公开(公告)日：2014-05-29

申请号：US14090498

申请日：2013-11-26

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer ,  Tal Inbar

IPC: G06F11/10

CPC classification number: G06F11/10 ,  H03M13/1105 ,  H03M13/1111 ,  H03M13/1114 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/116 ,  H03M13/3723 ,  H03M13/618 ,  H03M13/6362 ,  H03M13/6393

Abstract: A method includes accepting a definition of a mother Error Correction Code (ECC) that is represented by a set of parity check equations and includes first code words, and a definition of a punctured ECC that includes second code words and is derived from the mother ECC by removal of one or more of the parity check equations and removal of one or more punctured check symbols selected from among check symbols of the first code words. A mother decoder, which is designed to decode the mother ECC by exchanging messages between symbol nodes and check nodes in accordance with a predefined interconnection scheme that represents the mother ECC, is provided. An input code word of the punctured ECC is decoded using the mother decoder by initializing one or more of the symbol nodes and controlling one or more of the messages, and while retaining the interconnection scheme.

Abstract translation: 一种方法包括接受由一组奇偶校验方程表示的母体误差校正码（ECC）的定义，并且包括第一码字和包括第二码字并从母体ECC导出的穿孔ECC的定义 通过去除一个或多个奇偶校验方程和从第一码字的检查符号中选出的一个或多个穿孔校验符号的去除。 提供了一种母版解码器，其被设计为通过根据表示母ECC的预定互连方案在符号节点和校验节点之间交换消息来解码母ECC。 通过初始化符号节点中的一个或多个并控制消息中的一个或多个，同时保留互连方案，使用母版解码器解码穿孔ECC的输入码字。

公开(公告)号：US20130339815A1

公开(公告)日：2013-12-19

申请号：US13965508

申请日：2013-08-13

Applicant: Apple Inc.

Inventor： Micha Anholt ,  Naftali Sommer

IPC: H04L1/00

CPC classification number: H04L1/004 ,  H03M13/1111 ,  H03M13/3776 ,  H03M13/6502 ,  H03M13/6577

Abstract: A method includes accepting an input code word, which was produced by encoding data with an Error Correction Code (ECC), for decoding by a hardware-implemented ECC decoder. The input code word is pre-processed to produce a pre-processed code word, such that a first number of bit transitions that occur in the hardware-implemented ECC decoder while decoding the pre-processed code word is smaller than a second number of the bit transitions that would occur in the ECC decoder in decoding the input code word. The pre-processed code word is decoded using the ECC decoder, and the data is recovered from the decoded pre-processed code word.

Abstract translation: 一种方法包括接受通过用错误校正码（ECC）编码数据产生的输入码字，用于由硬件实现的ECC解码器进行解码。 输入代码字被预处理以产生预处理代码字，使得在解码预处理代码字时在硬件实现的ECC解码器中发生的第一数量的位转换小于第二数目的 在ECC解码器中将在对输入码字进行解码时发生的位转换。 使用ECC解码器解码预处理码字，并且从解码的预处理码字中恢复数据。

公开(公告)号：US20130258738A1

公开(公告)日：2013-10-03

申请号：US13905580

申请日：2013-05-30

Applicant: Apple Inc.

Inventor： Maya Barkon ,  Meir Dalal ,  Moti Teitel ,  Micha Anholt

IPC: G11C27/00

CPC classification number: G11C27/00 ,  G11C11/5642 ,  G11C16/3418 ,  G11C29/021 ,  G11C29/028

Abstract: A method includes reading a group of analog memory cells using first explicit read thresholds, to produce first readout results. The group is re-read using second explicit read thresholds, to produce second readout results. The group is read using one or more sets of auxiliary thresholds so as to produce auxiliary readout results, such that the number of the auxiliary thresholds in each set is the same as the number of the first explicit read thresholds and the same as the number of the second explicit read thresholds. A readout performance of third read thresholds, which include at least one of the first explicit read thresholds and at least one of the second explicit read thresholds, is evaluated using the first, second and auxiliary readout results.

Abstract translation: 一种方法包括使用第一显式读取阈值读取一组模拟存储器单元，以产生第一读出结果。 使用第二显式读取阈值重新读取该组，以产生第二读取结果。 使用一组或多组辅助阈值读取组，以产生辅助读出结果，使得每组中的辅助阈值的数量与第一显式读取阈值的数量相同，并且与第 第二个显式读取阈值。 使用第一，第二和辅助读出结果评估包括第一显式读取阈值和至少一个第二显式读取阈值中的至少一个的第三读取阈值的读出性能。

公开(公告)号：US20170163288A1

公开(公告)日：2017-06-08

申请号：US14961913

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Yonathan Tate ,  Asaf Landau ,  Micha Anholt

IPC: H03M13/11 ,  G06F11/07

CPC classification number: H03M13/1131 ,  G06F11/0727 ,  G06F11/076 ,  H03M13/1128 ,  H03M13/1137 ,  H03M13/114 ,  H03M13/116

Abstract: A decoder includes an interface and circuitry. The interface is configured to receive a code word that was encoded using a Quasi-Cyclic Low Density Parity Check (QC-LDPC) Error Correcting Code (ECC) represented by multiple check equations that are defined over multiple variables. The circuitry is configured to decode the code word by iteratively processing multiple layers that each includes a respective subset of the variables of the code word, and producing per each layer one or more count updates, and to generate a total number of errors corrected over the entire code word by accumulating the count updates.

公开(公告)号：US09454429B2

公开(公告)日：2016-09-27

申请号：US14595578

申请日：2015-01-13

Applicant: Apple Inc.

Inventor： Shai Ojalvo ,  Eyal Gurgi ,  Micha Anholt

IPC: G06F11/10 ,  G11C29/00 ,  H03M13/00 ,  G11C7/10 ,  G11C5/00

CPC classification number: G06F11/1016 ,  G06F11/1004 ,  G06F11/1044 ,  G06F11/108 ,  G11C5/005 ,  G11C7/1006 ,  G11C2207/104

Abstract: A method for data storage includes providing a mapping of data pages to physical pages, in which each physical page holds a non-integer number of the data pages, for storage of data in at least one memory block, including a plurality of the physical pages, in a memory device. The data pages that are mapped to the memory block are partitioned into groups, such that failure of any memory unit, which consists of a predefined number of the physical pages in the memory device, will produce errors in no more than one data page in each group. The data pages is stored in the physical pages of the memory block in accordance with the mapping, while a redundant storage scheme is applied among the data pages of each group.

公开(公告)号：US09281844B2

公开(公告)日：2016-03-08

申请号：US13865345

申请日：2013-04-18

Applicant: Apple Inc.

Inventor： Micha Anholt

IPC: H03M13/05 ,  H03M13/15 ,  H03M13/25 ,  G06F11/10 ,  H03M13/00

CPC classification number: H03M13/15 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/1595 ,  H03M13/6516 ,  H03M13/6561

Abstract: A method for encoding includes receiving input data symbols to be encoded with an Error Correction Code (ECC) so as to produce a code word of the ECC including redundancy symbols. The input data symbols are applied first and second processing stages, such that the first processing stage performs a first polynomial division by a fixed-coefficient polynomial with a first degree of parallelism, and the second processing stage performs a second polynomial division by a configurable-coefficient polynomial with a second degree of parallelism that is smaller than the first degree of parallelism, so as to jointly produce the redundancy symbols.

Abstract translation: 一种用于编码的方法包括接收要用纠错码（ECC）编码的输入数据符号，以产生包括冗余符号的ECC的码字。 输入数据符号被应用于第一和第二处理级，使得第一处理级通过具有第一并行度的固定系数多项式执行第一多项式除法，并且第二处理级通过可配置 - 具有小于第一并行度的第二并行度的系数多项式，以便共同产生冗余符号。