公开(公告)号：US20130299968A1

公开(公告)日：2013-11-14

申请号：US13546281

申请日：2012-07-11

Applicant: Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

Inventor： Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

IPC: H01L23/498 ,  H01L21/28

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3142 ,  H01L23/3675 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/35121

Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.

Abstract translation: 提供一种半导体封装，其包括：具有金属图案层的基板; 形成在所述基板上的半导体管芯; 以及填充在基板和半导体管芯之间的底部填充物。 在金属图案层中形成至少一个开口以减小基底上的金属图案层的面积，从而减小底部填充物和金属图案层之间的接触面积，从而消除了底部填充物的分层。

公开(公告)号：US07299341B2

公开(公告)日：2007-11-20

申请号：US11419202

申请日：2006-05-19

Applicant: Chang-Fu Lin

Inventor： Chang-Fu Lin

IPC: G06F12/00

CPC classification number: G06F9/3802 ,  G06F9/3808

Abstract: In a method for fetching instructions in an embedded system, a predicted one of a set of the instructions stored in a memory device is fetched and is subsequently stored in an instruction buffer when a system bus is in a data access phase. When a processor generates an access request for the memory device, the predicted one of the instructions stored in the instruction buffer is provided to the system bus for receipt by the processor upon determining that the predicted one of the instructions stored in the instruction buffer hits the access request from the processor. An embedded system with an instruction prefetching device is also disclosed.

Abstract translation: 在用于在嵌入式系统中取指令的方法中，当系统总线处于数据访问阶段时，存储在存储器件中的一组指令中的预测的一个指令被取出并随后被存储在指令缓冲器中。 当处理器产生对存储器件的访问请求时，存储在指令缓冲器中的指令中的预测的一个指令被提供给系统总线，以便在确定存储在指令缓冲器中的预测指令之一被命中时被处理器接收 来自处理器的访问请求。 还公开了一种具有指令预取装置的嵌入式系统。

公开(公告)号：US07057276B2

公开(公告)日：2006-06-06

申请号：US10690921

申请日：2003-10-21

Applicant: Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

Inventor： Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

IPC: H01L23/10 ,  H01L23/34

CPC classification number: H01L23/367 ,  H01L23/3672 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2224/05599

Abstract: A semiconductor package with a heat sink is provided. At least one chip and a heat sink attached to the chip are mounted on a substrate. At least one slot is formed through at least one corner of the heat sink at a position attached to the substrate. An adhesive material is applied between the heat sink and substrate and over filled in the slot with an overflow of the adhesive material out of the slot. The adhesive material over filled in the slot provides an anchoring effect and increases its contact area with the heat sink to thereby firmly secure the heat sink on the substrate. Further, the slot formed at the corner of the heat sink can alleviate thermal stresses accumulated at the corner of the heat sink and thereby prevent delamination between the heat sink and the substrate.

Abstract translation: 提供了具有散热器的半导体封装。 连接到芯片的至少一个芯片和散热片安装在基板上。 在连接到基板的位置处，通过散热器的至少一个角部形成至少一个槽。 将粘合剂材料施加在散热器和衬底之间并且在填充在槽中并且粘合剂材料溢出出槽之外。 填充在槽中的粘合剂材料提供锚定效果并增加其与散热器的接触面积，从而将散热器牢固地固定在基板上。 此外，形成在散热器角落处的槽可以减轻积聚在散热器拐角处的热应力，从而防止散热器和基板之间的分层。

公开(公告)号：US08698326B2

公开(公告)日：2014-04-15

申请号：US11900345

申请日：2007-09-10

Applicant: Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

Inventor： Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC: H01L23/28 ,  H01L23/48

CPC classification number: H01L21/561 ,  H01L23/3128 ,  H01L23/3142 ,  H01L29/0657 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

Abstract translation: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。

公开(公告)号：US08207973B2

公开(公告)日：2012-06-26

申请号：US12176674

申请日：2008-07-21

Applicant: Chang-Fu Lin ,  Shu-Wen Teng ,  Cheng-Che Chen ,  Wei-Cheng Gu

Inventor： Chang-Fu Lin ,  Shu-Wen Teng ,  Cheng-Che Chen ,  Wei-Cheng Gu

IPC: G09G3/36 ,  G09G5/39 ,  H04B7/24 ,  H04N7/24

CPC classification number: H04L12/66 ,  H04N1/00127 ,  H04N1/00129 ,  H04N2101/00 ,  H04N2201/0048

Abstract: An electronic device is disclosed. The electronic device comprises a transmitter, a converter, and a receiver. The transmitter transmits data and a control signal. The converter receives the control signal from the transmitter and converts the control signal. The receiver receives the data from the transmitter via a data bus isolated from the converter and receives the converted control signal from the converter. The data transmitted from the transmitter is directly electrically connected to the receiver.

Abstract translation: 公开了一种电子设备。 电子设备包括发射机，转换器和接收机。 发射机发射数据和控制信号。 转换器从发送器接收控制信号并转换控制信号。 接收器通过与转换器隔离的数据总线从发送器接收数据，并从转换器接收转换后的控制信号。 从发射机发送的数据直接电连接到接收机。

公开(公告)号：US08194146B2

公开(公告)日：2012-06-05

申请号：US12191547

申请日：2008-08-14

Applicant: Chang-Fu Lin ,  Shu-Wen Teng ,  Cheng-Che Chen ,  Wei Cheng Gu ,  Ching-Chao Yang ,  Shih Tang Lin

Inventor： Chang-Fu Lin ,  Shu-Wen Teng ,  Cheng-Che Chen ,  Wei Cheng Gu ,  Ching-Chao Yang ,  Shih Tang Lin

IPC: H04N5/228

CPC classification number: H04N5/772 ,  H04N5/04 ,  H04N5/765

Abstract: An apparatus for capturing and storing real-time images is provided. A camera module records frames corresponding to sensed light, outputs pixel data of the frames on a data bus, and generates synchronization control signals to control the synchronized transmission of the frames. An interrupt controller receives the synchronization control signals and correspondingly generates interrupt signals. A processing unit receives the interrupt signals, fetches the pixel data of the frames on the data bus according to at least one of the interrupt signals, and stores the fetched pixel data in a memory device.

Abstract translation: 提供了一种用于捕获和存储实时图像的设备。 相机模块记录与感测光对应的帧，在数据总线上输出帧的像素数据，并产生同步控制信号以控制帧的同步传输。 中断控制器接收同步控制信号并相应产生中断信号。 处理单元接收中断信号，根据至少一个中断信号取出数据总线上的帧的像素数据，并将获取的像素数据存储在存储器件中。

公开(公告)号：US07937520B2

公开(公告)日：2011-05-03

申请号：US12271073

申请日：2008-11-14

Applicant: Chang-Fu Lin ,  Shu-Wen Teng ,  Wei Cheng Gu ,  Cheng-Che Chen

Inventor： Chang-Fu Lin ,  Shu-Wen Teng ,  Wei Cheng Gu ,  Cheng-Che Chen

IPC: G06F13/36

CPC classification number: G06F13/387

Abstract: The invention discloses a general purpose interface controller, including a slave interface controller and a master interface controller, used to exchange data among master devices and slave devices in an electronic device. The slave interface controller receives data and a first control signal from one of the master devices, and converts the first control signal to a request signal. The master interface controller receives the data and the request signal from the slave interface controller, converts the request signal to a second control signal recognized by at least one of the slave devices, and forwards the data and the second control signal to the slave device.

Abstract translation: 本发明公开了一种通用接口控制器，包括从接口控制器和主接口控制器，用于在电子设备中的主设备和从设备之间交换数据。 从接口控制器从主设备之一接收数据和第一控制信号，并将第一控制信号转换为请求信号。 主接口控制器从从接口控制器接收数据和请求信号，将请求信号转换成由至少一个从设备识别的第二控制信号，并将数据和第二控制信号转发给从设备。

公开(公告)号：US20080061451A1

公开(公告)日：2008-03-13

申请号：US11900345

申请日：2007-09-10

Applicant: Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

Inventor： Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC: H01L23/495 ,  H01L21/00

CPC classification number: H01L21/561 ,  H01L23/3128 ,  H01L23/3142 ,  H01L29/0657 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

Abstract translation: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。

公开(公告)号：US20070050553A1

公开(公告)日：2007-03-01

申请号：US11307073

申请日：2006-01-23

Applicant: Ting-Cheng Hsu ,  Yen-Yu Lin ,  Chih-Wei Ko ,  Chang-Fu Lin

Inventor： Ting-Cheng Hsu ,  Yen-Yu Lin ,  Chih-Wei Ko ,  Chang-Fu Lin

IPC: G06F12/00

CPC classification number: G06F12/0848 ,  G06F12/0857 ,  G06F12/0897

Abstract: A processing module with multilevel cache architecture, including: a processor; a level-one (L1) cache, coupled to the processor, for caching data for the processor, wherein the L1 cache has at least one L1 cacheable range; a level-two (L2) cache, coupled to the L1 cache, for caching data for the processor, wherein the L2 cache has at least one L2 cacheable range, and the L1 cacheable range and the L2 cacheable range are mutually exclusive; and a memory interface, coupled to the L1 cache and the L2 cache, for transferring data between the L1 cache and a memory and for transferring data between the L2 cache and the memory.

Abstract translation: 具有多级缓存架构的处理模块，包括：处理器; 耦合到所述处理器的用于高速缓存用于所述处理器的数据的一级缓存（L 1），其中所述L 1高速缓存具有至少一个L 1可缓存范围; 耦合到所述L1缓存的二级（L2）高速缓存，用于缓存用于所述处理器的数据，其中所述L 2高速缓存具有至少一个L 2可缓存范围，并且所述L 1可缓存范围和所述L 2可缓存范围 是相互排斥的 以及耦合到L 1缓存和L 2高速缓存的存储器接口，用于在L 1高速缓存和存储器之间传送数据，并用于在L 2高速缓存和存储器之间传送数据。

公开(公告)号：US20060200630A1

公开(公告)日：2006-09-07

申请号：US11419202

申请日：2006-05-19

Applicant: Chang-Fu Lin

Inventor： Chang-Fu Lin

IPC: G06F12/00

CPC classification number: G06F9/3802 ,  G06F9/3808

Abstract: In a method for fetching instructions in an embedded system, a predicted one of a set of the instructions stored in a memory device is fetched and is subsequently stored in an instruction buffer when a system bus is in a data access phase. When a processor generates an access request for the memory device, the predicted one of the instructions stored in the instruction buffer is provided to the system bus for receipt by the processor upon determining that the predicted one of the instructions stored in the instruction buffer hits the access request from the processor. An embedded system with an instruction prefetching device is also disclosed.

Abstract translation: 在用于在嵌入式系统中取指令的方法中，当系统总线处于数据访问阶段时，存储在存储器件中的一组指令中的预测的一个指令被取出并随后被存储在指令缓冲器中。 当处理器产生对存储器件的访问请求时，存储在指令缓冲器中的指令中的预测的一个指令被提供给系统总线，以便在确定存储在指令缓冲器中的预测指令之一被命中时被处理器接收 来自处理器的访问请求。 还公开了一种具有指令预取装置的嵌入式系统。