公开(公告)号：US07863731B2

公开(公告)日：2011-01-04

申请号：US12001612

申请日：2007-12-11

Applicant: Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Ke-Chuan Yang ,  Chang-Fu Lin

IPC: H01L23/10

CPC classification number: H01L23/367 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.

Abstract translation: 在本发明中公开了一种散热结构和具有该散热结构的散热半导体封装。 散热半导体封装包括芯片载体，安装并电连接到芯片载体的倒装芯片半导体芯片，以及通过诸如焊料材料的热界面材料接合到倒装芯片半导体芯片的散热器，其中a 在热界面材料的接合区域周围的散热器上形成凹槽，并且在凹槽的表面上形成诸如金属氧化物层的阻挡层，以降低热界面材料的润湿能力，因此进一步 防止热界面材料在进行热界面材料的熔融过程中润湿槽，因此，确保热界面材料具有足够的厚度，用于在散热器和倒装芯片半导体芯片之间形成焊接。

公开(公告)号：US06849942B2

公开(公告)日：2005-02-01

申请号：US10438463

申请日：2003-05-14

Applicant: Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Ping Huang

Inventor： Chang-Fu Lin ,  Han-Ping Pu ,  Cheng-Hsu Hsiao ,  Chien Ping Huang

IPC: H01L23/367 ,  H01L23/34

CPC classification number: H01L23/3675 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

Abstract: A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a flange in contact with the substrate, allowing a plurality of clip members to clamp the flange of the heat sink and the substrate. Each of the clip members has a recess portion for receiving the flange of the heat sink and the substrate to thereby firmly position the heat sink on the substrate. The clip members are engaged with edges of the heat sink and the substrate, thereby not affecting trace routability on the substrate. Moreover, the heat sink is mounted on the substrate and would not be dislocated.

Abstract translation: 提供了具有散热器的半导体封装，其中至少一个芯片安装在基板上并被散热器覆盖。 散热器形成有与基板接触的凸缘，允许多个夹子构件夹紧散热器和基板的凸缘。 每个夹子构件具有用于容纳散热器和基板的凸缘的凹部，从而将散热器牢固地定位在基板上。 夹子构件与散热器和基板的边缘接合，从而不影响基板上的迹线布线性。 此外，散热器安装在基板上并且不会脱位。

公开(公告)号：US06424189B1

公开(公告)日：2002-07-23

申请号：US09687418

申请日：2000-10-13

Applicant: Jen-Pin Su ,  Tsan-Hui Chen ,  Wen-Hsiang Lin ,  Chun-Chieh Wu ,  Chang-Fu Lin

Inventor： Jen-Pin Su ,  Tsan-Hui Chen ,  Wen-Hsiang Lin ,  Chun-Chieh Wu ,  Chang-Fu Lin

IPC: H03L700

CPC classification number: G06F5/06 ,  H04L7/005 ,  H04L7/02

Abstract: The present invention discloses an apparatus and system for multi-stage event synchronization, whose main object is to eliminate the drawbacks of an expensive synchronization circuit used to balance the data transmissions between an origination agent and a destination agent operating at different frequencies or clock phases as in prior art. The apparatus of the present invention organizes the slower one with multi-stage chains, each of which comprises a simple synchronization circuit and an XOR gate, for receiving the number of events transmitted from the faster one. Therefore, the slower one will not miss the data from the faster one.

Abstract translation: 本发明公开了一种用于多级事件同步的装置和系统，其主要目的是消除用于平衡在不同频率或时钟相位工作的发起代理和目的代理之间的数据传输的昂贵的同步电路的缺点，如 在现有技术中。 本发明的装置组合了具有多级链的较慢级的链，其中每一级都包括一个简单的同步电路和一个异或门，用于接收从较快级链发送的事件数。 因此，较慢的数据不会错过更快的数据。

公开(公告)号：US09666453B2

公开(公告)日：2017-05-30

申请号：US13546281

申请日：2012-07-11

Applicant: Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

Inventor： Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

IPC: H01L21/56 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3142 ,  H01L23/3675 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/35121

Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.

公开(公告)号：US20130299968A1

公开(公告)日：2013-11-14

申请号：US13546281

申请日：2012-07-11

Applicant: Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

Inventor： Chang-Fu Lin ,  Ho-Yi Tsai ,  Chin-Tsai Yao

IPC: H01L23/498 ,  H01L21/28

CPC classification number: H01L23/49838 ,  H01L21/563 ,  H01L23/293 ,  H01L23/3142 ,  H01L23/3675 ,  H01L23/49827 ,  H01L24/06 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/35121

Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.

Abstract translation: 提供一种半导体封装，其包括：具有金属图案层的基板; 形成在所述基板上的半导体管芯; 以及填充在基板和半导体管芯之间的底部填充物。 在金属图案层中形成至少一个开口以减小基底上的金属图案层的面积，从而减小底部填充物和金属图案层之间的接触面积，从而消除了底部填充物的分层。

公开(公告)号：US07299341B2

公开(公告)日：2007-11-20

申请号：US11419202

申请日：2006-05-19

Applicant: Chang-Fu Lin

Inventor： Chang-Fu Lin

IPC: G06F12/00

CPC classification number: G06F9/3802 ,  G06F9/3808

Abstract: In a method for fetching instructions in an embedded system, a predicted one of a set of the instructions stored in a memory device is fetched and is subsequently stored in an instruction buffer when a system bus is in a data access phase. When a processor generates an access request for the memory device, the predicted one of the instructions stored in the instruction buffer is provided to the system bus for receipt by the processor upon determining that the predicted one of the instructions stored in the instruction buffer hits the access request from the processor. An embedded system with an instruction prefetching device is also disclosed.

Abstract translation: 在用于在嵌入式系统中取指令的方法中，当系统总线处于数据访问阶段时，存储在存储器件中的一组指令中的预测的一个指令被取出并随后被存储在指令缓冲器中。 当处理器产生对存储器件的访问请求时，存储在指令缓冲器中的指令中的预测的一个指令被提供给系统总线，以便在确定存储在指令缓冲器中的预测指令之一被命中时被处理器接收 来自处理器的访问请求。 还公开了一种具有指令预取装置的嵌入式系统。

公开(公告)号：US07203072B2

公开(公告)日：2007-04-10

申请号：US10851288

申请日：2004-05-21

Applicant: Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chin-Te Chen ,  Chang-Fu Lin

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H01L23/10 ,  H01L23/36 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/16315 ,  H01L2924/00

Abstract: A heat dissipating structure and a semiconductor package with the same are proposed. A substrate is used to accommodate at least one chip thereon, and the chip is electrically connected to the substrate. A heat dissipating structure having a flat portion and a support portion is mount on the substrate via the support portion by means of an adhesive. At least one groove is formed on the support portion and at least one air vent is formed around the groove to allow the groove to communicate with the outside via the air vent, such that the adhesive is allowed to fill the groove to expel air from the groove to the atmosphere through the air vent, thereby preventing the air from trapped in the groove.

Abstract translation: 提出了一种散热结构及其半导体封装。 衬底用于容纳至少一个芯片，芯片电连接至衬底。 具有平坦部分和支撑部分的散热结构通过粘合剂经由支撑部分安装在基板上。 在支撑部分上形成至少一个凹槽，并且围绕凹槽形成至少一个排气孔，以允许凹槽经由排气口与外部连通，使得允许粘合剂填充凹槽以从空气中排出空气 通过排气口到大气中，从而防止空气被捕获在槽中。

公开(公告)号：US07057276B2

公开(公告)日：2006-06-06

申请号：US10690921

申请日：2003-10-21

Applicant: Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

Inventor： Chang-Fu Lin ,  Han-Ping Pu ,  Chien-Ping Huang

IPC: H01L23/10 ,  H01L23/34

CPC classification number: H01L23/367 ,  H01L23/3672 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2224/05599

Abstract: A semiconductor package with a heat sink is provided. At least one chip and a heat sink attached to the chip are mounted on a substrate. At least one slot is formed through at least one corner of the heat sink at a position attached to the substrate. An adhesive material is applied between the heat sink and substrate and over filled in the slot with an overflow of the adhesive material out of the slot. The adhesive material over filled in the slot provides an anchoring effect and increases its contact area with the heat sink to thereby firmly secure the heat sink on the substrate. Further, the slot formed at the corner of the heat sink can alleviate thermal stresses accumulated at the corner of the heat sink and thereby prevent delamination between the heat sink and the substrate.

Abstract translation: 提供了具有散热器的半导体封装。 连接到芯片的至少一个芯片和散热片安装在基板上。 在连接到基板的位置处，通过散热器的至少一个角部形成至少一个槽。 将粘合剂材料施加在散热器和衬底之间并且在填充在槽中并且粘合剂材料溢出出槽之外。 填充在槽中的粘合剂材料提供锚定效果并增加其与散热器的接触面积，从而将散热器牢固地固定在基板上。 此外，形成在散热器角落处的槽可以减轻积聚在散热器拐角处的热应力，从而防止散热器和基板之间的分层。

公开(公告)号：US06980438B2

公开(公告)日：2005-12-27

申请号：US10759863

申请日：2004-01-16

Applicant: Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

Inventor： Chien-Ping Huang ,  Han-Ping Pu ,  Chin-Te Chen ,  Chang-Fu Lin

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/055 ,  H01L23/10 ,  H01L23/367 ,  H01L23/467 ,  H01L25/065 ,  H05K7/20

CPC classification number: H01L23/467 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/055 ,  H01L23/10 ,  H01L23/3672 ,  H01L23/3675 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/16315 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00

Abstract: A semiconductor package with a heat dissipating structure includes a substrate, a chip and a heat dissipating structure. The chip is mounted on and electrically connected to the substrate. The heat dissipating structure includes a first heat sink having at least one positioning portion, and at least one second heat sink having at least one second positioning portion and at least one hollow portion. The second heat sink is mounted on the substrate, and the first positioning portion of the first heat sink is attached to the second positioning portion of the second heat sink, allowing the chip to be accommodated in a space defined by the first heat sink, the hollow portion of the second heat sink and the substrate. This semiconductor package has good heat dissipating efficiency and is cost-effective to fabricate.

公开(公告)号：US08698326B2

公开(公告)日：2014-04-15

申请号：US11900345

申请日：2007-09-10

Applicant: Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

Inventor： Wen-Home Huang ,  Wen-Tsung Tseng ,  Chang-Fu Lin ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

IPC: H01L23/28 ,  H01L23/48

CPC classification number: H01L21/561 ,  H01L23/3128 ,  H01L23/3142 ,  H01L29/0657 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/10158 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.

Abstract translation: 公开了半导体封装及其制造方法。 该制造方法包括以下步骤：提供具有与活性表面相对的活性表面和非活性表面的半导体芯片，粗糙化非活性表面的周边部分，以将非活性表面划分成周边部分 形成有粗糙结构和非粗糙化的中心部分，通过形成在有源表面上的多个焊料凸块将半导体芯片安装在芯片载体上，在芯片载体上形成密封剂以封装半导体芯片。 形成在半导体芯片的非活性表面的周边部分上的粗糙结构可以加强半导体芯片和密封剂之间的接合，并且半导体芯片的非活性表面的非粗糙化的中心部分可以保持 半导体芯片的结构强度。