利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

31 条记录 (耗时 0.022 秒)

    Fin field effect transistor arrangement and method for producing a fin field effect transistor arrangement
    14.
    发明授权
    Fin field effect transistor arrangement and method for producing a fin field effect transistor arrangement 有权
    翅片场效应晶体管布置及其制造方法

    公开(公告)号：US07719059B2

    公开(公告)日：2010-05-18

    申请号：US11588868

    申请日：2006-10-27

    申请人： Franz Hofmann ,  Erhard Landgraf ,  Richard Johannes Luyken

    发明人： Franz Hofmann ,  Erhard Landgraf ,  Richard Johannes Luyken

    IPC分类号： H01L21/84 ,  H01L21/8238 ,  H01L27/12

    CPC分类号： H01L21/845 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78636

    摘要： A fin field effect transistor arrangement comprises a substrate and a first fin field effect transistor on and/or in the substrate. The first fin field effect transistor includes a fin in which a channel region is formed between a first source/drain region and a second source/drain region and above which a gate region is formed. A second fin field effect transistor is provided on and/or in the substrate including a fin in which a channel region is formed between a first source/drain region and a second source/drain region and above which a gate region is formed. The second fin field effect transistor is arranged laterally alongside the first fin field effect transistor, wherein a height of the fin of the first fin field effect transistor is greater than a height of the fin of the second fin field effect transistor.

    摘要翻译： 鳍状场效应晶体管布置包括衬底和衬底上和/或衬底中的第一鳍状场效应晶体管。 第一鳍状场效应晶体管包括鳍状物，其中在第一源极/漏极区域和第二源极/漏极区域之间形成沟道区域，并且在其上形成栅极区域。 第二鳍状场效应晶体管设置在衬底上和/或衬底中，包括在第一源极/漏极区域和第二源极/漏极区域之间形成沟道区域的鳍片，并且在其上形成栅极区域。 第二鳍状场效应晶体管沿第一鳍状场效应晶体管横向布置，其中第一鳍状场效应晶体管的鳍的高度大于第二鳍状场效应晶体管的鳍的高度。

    Memory element and method for fabricating a memory element
    15.
    发明授权
    Memory element and method for fabricating a memory element 失效
    用于制造存储元件的存储元件和方法

    公开(公告)号：US06730930B2

    公开(公告)日：2004-05-04

    申请号：US10275598

    申请日：2003-04-21

    申请人： Franz Hofmann ,  Richard Johannes Luyken ,  Wolfgang Rösner

    发明人： Franz Hofmann ,  Richard Johannes Luyken ,  Wolfgang Rösner

    IPC分类号： H01L3524

    CPC分类号： H01L27/28 ,  B82Y10/00 ,  G11C13/0014 ,  G11C13/0016 ,  G11C2213/77 ,  H01L51/0575

    摘要： A memory element with organic material comprises two metallized layers, arranged one on top of the other, with first lines and second lines which are arranged to intersect with each other. A channel is formed at the intersections between the first line and the second line, which overlaps the first line partially and completely overlaps the second line. The channels are filled with a filling material, the electrical conductivity of which may be altered by an applied electrical voltage.

    摘要翻译： 具有有机材料的存储元件包括两个金属化层，其一个在另一个的顶部上，第一线和第二线被布置为彼此相交。 在第一线和第二线之间的交叉处形成通道，其与第一线重叠，并且与第二线完全重叠。 通道填充有填充材料，其电导率可以通过施加的电压而改变。

    Method for producing a trench transistor and trench transistor
    19.
    发明授权
    Method for producing a trench transistor and trench transistor 失效
    沟槽晶体管和沟槽晶体管的制造方法

    公开(公告)号：US07605032B2

    公开(公告)日：2009-10-20

    申请号：US11529446

    申请日：2006-09-28

    申请人： Richard Johannes Luyken ,  Hans-Peter Moll ,  Martin Popp ,  Till Schloesser ,  Marc Strasser ,  Rolf Weis

    发明人： Richard Johannes Luyken ,  Hans-Peter Moll ,  Martin Popp ,  Till Schloesser ,  Marc Strasser ,  Rolf Weis

    IPC分类号： H01L21/334 ,  H01L21/8234 ,  H01L27/108 ,  H01L29/94 ,  H01L21/336 ,  H01L27/088

    CPC分类号： H01L21/26586 ,  H01L29/66537 ,  H01L29/66621 ,  H01L29/7834

    摘要： In a method for producing a trench transistor, a substrate of a first conduction type is provided and a trench in the substrate and a gate dielectric in the trench are formed. A first conductive filling in the trench as a gate electrode on the gate dielectric and first source and drain regions are formed. An etched-back first conductive filling is produced by etching back the first conductive filling down to a depth below the first source and drain regions and second source and drain regions are formed. The second source and drain regions adjoin the first source and drain regions and extend to a depth at least as far as the etched-back first conductive filling. An insulation spacer above the etched-back first conductive filling is formed in the trench and a second conductive filling is provided in the trench as an upper part of the gate electrode.

    摘要翻译： 在制造沟槽晶体管的方法中，提供第一导电类型的衬底，并且形成衬底中的沟槽和沟槽中的栅极电介质。 形成沟槽中作为栅极电介质和第一源极和漏极区域上的栅电极的第一导电填充物。 蚀刻后的第一导电填充物是通过将第一导电填料向下蚀刻回到低于第一源的深度并形成漏极区和第二源极和漏极区而产生的。 第二源极和漏极区域与第一源极和漏极区域相邻并且延伸至至少与蚀刻后的第一导电填充物一样深的深度。 在所述沟槽中形成有在所述蚀刻后的第一导电填充物上方的绝缘间隔物，并且在所述沟槽中设置第二导电填充物作为所述栅电极的上部。