Field effect transistors having multiple effective work functions
    12.
    发明授权
    Field effect transistors having multiple effective work functions 有权
    具有多个有效功能的场效应晶体管

    公开(公告)号:US09484427B2

    公开(公告)日:2016-11-01

    申请号:US14320831

    申请日:2014-07-01

    Abstract: Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.

    Abstract translation: 硅 - 锗表面层在半导体表面上的选择性沉积可用于为场效应晶体管提供两种类型的沟道区。 在硅基栅极电介质和高介电常数(高k)栅极电介质的堆叠上的调整氧化物材料的退火可以用于形成接触通道区域子集的界面调整氧化物层。 通过沉积第一功函数金属材料层和封盖层和随后的退火,可以在覆盖界面调整氧化物层的高k电介质层的部分中诱导氧缺乏。 可以通过物理暴露高k电介质层的部分来选择性地去除氧缺乏。 可以将第二功函数金属材料层和栅极导体层沉积并平坦化以形成提供多个有效功函数的栅电极。

    Replacement metal gate structures for effective work function control
    14.
    发明授权
    Replacement metal gate structures for effective work function control 有权
    更换金属门结构,实现有效的工作功能控制

    公开(公告)号:US09293461B2

    公开(公告)日:2016-03-22

    申请号:US13780003

    申请日:2013-02-28

    CPC classification number: H01L27/0922 H01L21/823842

    Abstract: A stack of a barrier metal layer and a first-type work function metal layer is deposited in replacement metal gate schemes. The barrier metal layer can be deposited directly on the gate dielectric layer. The first-type work function metal layer is patterned to be present only in regions of a first type field effect transistor. A second-type work function metal layer is deposited directly on the barrier metal layer in the regions of a second type field effect transistor. Alternately, the first-type work function layer can be deposited directly on the gate dielectric layer. The barrier metal layer is patterned to be present only in regions of a first type field effect transistor. A second-type work function metal layer is deposited directly on the gate dielectric layer in the regions of the second type field effect transistor. A conductive material fill and planarization form dual work function replacement gate structures.

    Abstract translation: 在替换金属栅极方案中沉积阻挡金属层和第一型功函数金属层的堆叠。 阻挡金属层可以直接沉积在栅极介电层上。 图案化第一型功函数金属层仅存在于第一类场效应晶体管的区域中。 第二类功函数金属层直接沉积在第二类场效应晶体管的区域中的势垒金属层上。 或者,第一类功函数层可以直接沉积在栅介电层上。 图案化阻挡金属层仅存在于第一类场效应晶体管的区域中。 第二类型功函数金属层直接沉积在第二类场效应晶体管的区域中的栅介质层上。 导电材料填充和平坦化形成双功能功能替代栅极结构。

    Multi-composition gate dielectric field effect transistors
    19.
    发明授权
    Multi-composition gate dielectric field effect transistors 有权
    多组合栅介质场效应晶体管

    公开(公告)号:US09397175B2

    公开(公告)日:2016-07-19

    申请号:US14881766

    申请日:2015-10-13

    Abstract: A first gate structure and a second gate structure are formed over a semiconductor material layer. The first gate structure includes a planar silicon-based gate dielectric, a planar high-k gate dielectric, a metallic nitride portion, and a first semiconductor material portion, and the second gate structure includes a silicon-based dielectric material portion and a second semiconductor material portion. After formation of gate spacers and a planarization dielectric layer, the second gate structure is replaced with a transient gate structure including a chemical oxide portion and a second high-k gate dielectric. A work-function metal layer and a conductive material portion can be formed in each gate electrode by replacement of semiconductor material portions. A gate electrode includes the planar silicon-based gate dielectric, the planar high-k gate dielectric, and a U-shaped high-k gate dielectric, and another gate electrode includes the chemical oxide portion and another U-shaped high-k gate dielectric.

    Abstract translation: 在半导体材料层上形成第一栅极结构和第二栅极结构。 第一栅极结构包括平面硅基栅极电介质,平面高k栅极电介质,金属氮化物部分和第一半导体材料部分,并且第二栅极结构包括硅基电介质材料部分和第二半导体 材料部分。 在形成栅极间隔物和平坦化介电层之后,用包括化学氧化物部分和第二高k栅极电介质的瞬态栅极结构来代替第二栅极结构。 可以通过更换半导体材料部分在每个栅电极中形成功函数金属层和导电材料部分。 栅电极包括平面硅基栅极电介质,平面高k栅极电介质和U形高k栅极电介质,另一个栅电极包括化学氧化物部分和另一个U形高k栅极电介质 。

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