Relay apparatus
    12.
    发明授权
    Relay apparatus 失效
    继电器

    公开(公告)号:US07046960B2

    公开(公告)日:2006-05-16

    申请号:US10001759

    申请日:2001-10-24

    IPC分类号: H04B7/14

    摘要: While a spectrum waveform of an output signal from a subtracter (207) is visibly monitored, an operator controls a variable phases shifter (208) based upon a second control signal (CL2) so that a shape of a spectrum waveform of an output signal from a subtracter (207) is approximated to a spectrum waveform of a desirable wave to change a phase of a local oscillation frequency signal from a local oscillator (206). As a result, a phase of a duplicated loop signal is changed. Also, the operator controls a variable attenuator (209) based upon a first control signal (CL1) so that a shape of this spectrum waveform is approximated to a spectrum waveform of a desirable wave (20) to change a signal level of the duplicated loop signal.

    摘要翻译: 当可见地监视来自减法器(207)的输出信号的频谱波形时,操作员基于第二控制信号(CL 2)控制可变相移器(208),使得输出信号的频谱波形的形状 近似于从本地振荡器(206)改变本地振荡频率信号的相位的期望波的频谱波形。 结果,改变了重复的环路信号的相位。 另外,操作员根据第一控制信号(CL 1)控制可变衰减器(209),使得该频谱波形的形状近似于期望波(20)的频谱波形,以改变复制的信号的信号电平 回路信号。

    Resin-sealed chip stack type semiconductor device
    13.
    发明授权
    Resin-sealed chip stack type semiconductor device 失效
    树脂密封芯片堆叠型半导体器件

    公开(公告)号:US06545365B2

    公开(公告)日:2003-04-08

    申请号:US09781237

    申请日:2001-02-13

    IPC分类号: H01L2348

    摘要: A resin-sealed chip stack type semiconductor device comprises a substrate placed on many balls, a bottom chip to which wires are connected, a top chip to which wires are connected and mounted above the bottom chip, a non-conductive bonding layer which functions to bond and fix the two chips to each other, and a sealing resin which covers and protects all the components mounted on the substrate. The non-conductive bonding layer is provided by die bonding in such a manner that is at least covers the portion of the bottom chip where the corresponding wires are connected and does not allow generation of a gap between the two chips.

    摘要翻译: 一种树脂密封芯片堆叠型半导体器件,包括放置在许多球上的衬底,连接有导线的底部芯片,连接并且安装在底部芯片上方的导线的顶部芯片,非导电结合层,其功能于 将两个芯片彼此粘合并固定,以及密封树脂,其覆盖并保护安装在基板上的所有部件。 非导电结合层通过芯片接合以至少覆盖底部芯片的相应导线连接部分并且不允许在两个芯片之间产生间隙的方式提供。

    Optoelectronic memory, logic, and interconnection device including an
optical bistable circuit
    14.
    发明授权
    Optoelectronic memory, logic, and interconnection device including an optical bistable circuit 失效
    包括光学双稳态电路的光电存储器,逻辑和互连装置

    公开(公告)号:US5095200A

    公开(公告)日:1992-03-10

    申请号:US640278

    申请日:1991-01-11

    摘要: An optoelectronic memory, logic, and interconnection device having an optical bistable circuit as an essential element. The optical bistable circuit includes an optical bistable switch which is a light emitting device and a first phototransistor detecting the light emitted from the light emitting device, connected in series, a second phototransistor connected in parallel to the optical bistable switch which does not detect the light emitted from the light emitting device, and a load resistor connected in series to the optical bistable switch. The optoelectronic memory, logic, and interconnection device operates as an optoelectronic memory device turned on and off with the same light source, as an optoelectronic logic device executing exclusive OR operation, or as a light source for reconfigurable optical interconnection.

    摘要翻译: 具有光学双稳态电路作为必需元件的光电存储器,逻辑和互连器件。 光学双稳态电路包括光双稳态开关,其是发光器件和第一光电晶体管,其检测从串联连接的发光器件发射的光,并联连接到不检测光的光学双稳态开关的第二光电晶体管 从发光器件发射的负载电阻器和与光学双稳态开关串联连接的负载电阻器。 光电存储器,逻辑器件和互连器件作为光电存储器件工作,作为与执行异或运算的光电逻辑器件相同的光源,或作为用于可重构光互连的光源而导通和截止的光电存储器件。

    Optical operational memory device
    19.
    发明授权
    Optical operational memory device 失效
    光操作存储设备

    公开(公告)号:US5315105A

    公开(公告)日:1994-05-24

    申请号:US100076

    申请日:1993-07-29

    CPC分类号: H01L27/1443 H01L27/15

    摘要: An optical operational memory device comprises a light-emitting device, a first and second phototransistors, and a load resistor. The light-emitting device and the first phototransistor are connected electrically in series to form an optical bistable switch based on optical positive feedback. The second phototransistor is connected in parallel to the optical bistable switch, and the load resistor is connected in series to the optical bistable switch. The time constant given by the product of the current gain of the second phototransistor, the base-collector capacitance of the second phototransistor, and the resistance of the load resistor is larger than the period required for recombination of the excess majority carriers in the base of the first phototransistor. A single optical beam modulated with pulse signals is input to the first and the second phototransistors simultaneously. The optical pulse with a peak power in a predetermined range turns the optical bistable switch on, and the pulse with higher peak power turns the optical bistable switch off.

    摘要翻译: 光学操作存储器件包括发光器件,第一和第二光电晶体管和负载电阻器。 发光器件和第一光电晶体管串联电连接以形成基于光学正反馈的光学双稳态开关。 第二光电晶体管与光双稳态开关并联连接,负载电阻与光双稳态开关串联。 由第二光电晶体管的电流增益,第二光电晶体管的基极集电极电容和负载电阻的电阻的乘积给出的时间常数大于基极中的多余载流子的复合所需的时间 第一个光电晶体管。 用脉冲信号调制的单个光束同时输入到第一和第二光电晶体管。 具有预定范围内的峰值功率的光脉冲使光学双稳态开关导通,并且具有较高峰值功率的脉冲使光学双稳态开关断开。

    Optoelectronic integrated circuit
    20.
    发明授权
    Optoelectronic integrated circuit 失效
    光电集成电路

    公开(公告)号:US4956682A

    公开(公告)日:1990-09-11

    申请号:US154214

    申请日:1988-02-10

    IPC分类号: H01L27/15 H01S5/026 H01S5/062

    摘要: An optoelectronic integrated circuit includes an N.sup.+ type cladding layer, an N type cladding layer, an active layer smaller in band gap than the N type cladding layer and a P type waveguide greater in band gap than the active layer sequentially formed on a semi-insulating substrate, a P type cladding layer partially formed on the surface of the P type waveguide, a laser composed of these N.sup.+ type and N type cladding layers, active layer, waveguide and P type cladding layer, and an N type emitted layer wider in band gap than the P type waveguide formed partially on the surface of the P type waveguide, thereby composing a heterojunction bipolar transistor using the N type cladding layer as the collector and the P type waveguide as the base.

    摘要翻译: 光电集成电路包括N +型覆层,N型覆层,与N型覆层相比带隙小的有源层和比半导体层顺序形成的有源层更大的带隙的P型波导 基板,部分地形成在P型波导的表面上的P型包覆层,由这些N +型和N型覆盖层,有源层,波导和P型覆层形成的激光,以及更宽带的N型发射层 间隙比部分地形成在P型波导表面上的P型波导,从而构成使用N型包覆层作为集电体和P型波导作为基极的异质结双极晶体管。