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38 条记录 (耗时 0.028 秒)

    PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same
    11.
    发明申请
    PRAMs having a plurality of active regions located vertically in sequence and methods of forming the same 有权
    具有多个有序区域的垂直位置的PRAM及其形成方法

    公开(公告)号：US20060076548A1

    公开(公告)日：2006-04-13

    申请号：US11246863

    申请日：2005-10-07

    申请人： Jae-Hyun Park ,  Hyeong-Geun An ,  Su-Jin Ahn ,  Yoon-Jong Song ,  Hyung-Joo Youn ,  Kyu-Chul Kim

    发明人： Jae-Hyun Park ,  Hyeong-Geun An ,  Su-Jin Ahn ,  Yoon-Jong Song ,  Hyung-Joo Youn ,  Kyu-Chul Kim

    IPC分类号： H01L29/02

    CPC分类号： H01L27/2436 ,  H01L45/06 ,  H01L45/144

    摘要： There are provided PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same. The PRAM and the method provide an approach to rapidly changing phase in a phase change layer pattern with a given design rule. A semiconductor substrate defining at least one reference active region is prepared in a cell array region and a peripheral circuit region. Other semiconductor substrates on a vertical line passing a main surface of the reference active region are located in sequence. The other semiconductor substrates define other active regions, respectively. A lower cell gate pattern is formed on the semiconductor substrate of the reference active region, and upper cell gate patterns are disposed on the other semiconductor substrates of the other active regions, respectively.

    摘要翻译： 提供了具有顺序定位的多个活性区域和其形成方法的PRAMS。 PRAM和该方法提供了用给定设计规则快速改变相变层图案中的相位的方法。 在单元阵列区域和外围电路区域中制备限定至少一个参考有源区的半导体衬底。 在通过参考有源区域的主表面的垂直线上的其它半导体衬底依次定位。 其他半导体衬底分别限定其它有源区。 在参考有源区的半导体衬底上形成下电池栅极图案，并且上电池栅极图案分别设置在其它有源区的其它半导体衬底上。

    Ferroelectric memory device and method of fabricating the same
    12.
    发明授权
    Ferroelectric memory device and method of fabricating the same 有权
    铁电存储器件及其制造方法

    公开(公告)号：US06717197B2

    公开(公告)日：2004-04-06

    申请号：US10245004

    申请日：2002-09-16

    申请人： Hyeong-Geun An

    发明人： Hyeong-Geun An

    IPC分类号： H01L2976

    CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

    摘要： A ferroelectric memory device and a method of fabricating the same are provided. The ferroelectric memory device includes at least two capacitor patterns and a plate line. Each of the capacitor patterns includes a lower electrode, a ferroelectric layer, and an upper electrode that are stacked on a semiconductor substrate. A top of the plate line is covered with an oxygen barrier layer, and a sidewall of the plate line is covered with an oxygen barrier spacer.

    摘要翻译： 提供了一种铁电存储器件及其制造方法。 铁电存储器件包括至少两个电容器图案和板线。 每个电容器图案包括堆叠在半导体衬底上的下电极，铁电层和上电极。 板线的顶部被氧阻挡层覆盖，并且板状线的侧壁被氧隔离隔离物覆盖。

    Nonvolatile memory device using variable resistive element
    13.
    发明授权
    Nonvolatile memory device using variable resistive element 有权
    使用可变电阻元件的非易失性存储器件

    公开(公告)号：US08502184B2

    公开(公告)日：2013-08-06

    申请号：US13103013

    申请日：2011-05-06

    申请人： Hyeong-Geun An ,  Sung-Lae Cho ,  Ik-Soo Kim ,  Dong-Hyun Im ,  Eun-Hee Cho

    发明人： Hyeong-Geun An ,  Sung-Lae Cho ,  Ik-Soo Kim ,  Dong-Hyun Im ,  Eun-Hee Cho

    IPC分类号： H01L29/02

    CPC分类号： H01L45/04 ,  H01L27/2427 ,  H01L27/249 ,  H01L45/1226

    摘要： A nonvolatile memory device and a method of fabricating the same are provided. The nonvolatile memory device includes a conductive pillar that extends from a substrate in a first direction, a variable resistor that surrounds the conductive pillar, a switching material layer that surrounds the variable resistor, a first conductive layer that extends in a second direction, and a first electrode that extends in a third direction and contacts the first conductive layer and the switching material layer. Not one of the first, second, and third directions is parallel to another one of the first, second, and third directions.

    摘要翻译： 提供了一种非易失性存储器件及其制造方法。 非易失性存储器件包括从第一方向从衬底延伸的导电柱，围绕导电柱的可变电阻器，围绕可变电阻器的开关材料层，沿第二方向延伸的第一导电层，以及 第一电极，其在第三方向上延伸并接触第一导电层和开关材料层。 第一，第二和第三方向中没有一个平行于第一，第二和第三方向的另一个。

    PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same
    16.
    发明申请
    PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same 有权
    PRAMS具有顺序地定位的多个活性区域和形成该活性区域的方法

    公开(公告)号：US20080070344A1

    公开(公告)日：2008-03-20

    申请号：US11982940

    申请日：2007-11-06

    申请人： Jae-Hyun Park ,  Hyeong-Geun An ,  Su-Jin Ahn ,  Yoon-Jong Song ,  Hyung-Joo Youn ,  Kyu-Chul Kim

    发明人： Jae-Hyun Park ,  Hyeong-Geun An ,  Su-Jin Ahn ,  Yoon-Jong Song ,  Hyung-Joo Youn ,  Kyu-Chul Kim

    IPC分类号： H01L45/00

    CPC分类号： H01L27/2436 ,  H01L45/06 ,  H01L45/144

    摘要： There are provided PRAMS having a plurality of active regions located vertically in sequence and methods of forming the same. The PRAM and the method provide an approach to rapidly changing phase in a phase change layer pattern with a given design rule. A semiconductor substrate defining at least one reference active region is prepared in a cell array region and a peripheral circuit region. Other semiconductor substrates on a vertical line passing a main surface of the reference active region are located in sequence. The other semiconductor substrates define other active regions, respectively. A lower cell gate pattern is formed on the semiconductor substrate of the reference active region, and upper cell gate patterns are disposed on the other semiconductor substrates of the other active regions, respectively.

    摘要翻译： 提供了具有顺序定位的多个活性区域和其形成方法的PRAMS。 PRAM和该方法提供了用给定设计规则快速改变相变层图案中的相位的方法。 在单元阵列区域和外围电路区域中制备限定至少一个参考有源区的半导体衬底。 在通过参考有源区域的主表面的垂直线上的其它半导体衬底依次定位。 其他半导体衬底分别限定其它有源区。 在参考有源区的半导体衬底上形成下电池栅极图案，并且上电池栅极图案分别设置在其它有源区的其它半导体衬底上。

    Ferroelectric capacitors including a seed conductive film
    17.
    发明授权
    Ferroelectric capacitors including a seed conductive film 失效
    铁电电容器包括种子导电膜

    公开(公告)号：US07064365B2

    公开(公告)日：2006-06-20

    申请号：US10705680

    申请日：2003-11-10

    申请人： Hyeong-Geun An ,  Sang-Woo Lee ,  Hyoung-Joon Kim

    发明人： Hyeong-Geun An ,  Sang-Woo Lee ,  Hyoung-Joon Kim

    IPC分类号： H01L29/76

    CPC分类号： H01L28/75 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/65

    摘要： Ferroelectric capacitors include a support insulating film on an integrated circuit substrate and having a trench therein. A lower electrode is on sidewalls and a bottom surface of the trench. A seed conductive film covers the lower electrode. A ferroelectric film is provided on the support insulating film and the seed conductive film and an upper electrode is provided on the ferroelectric film. The lower electrode may fill the trench and the ferroelectric film may extend over all of the seed conductive film and the support insulating film adjacent the seed conductive film.

    摘要翻译： 铁电电容器包括集成电路基板上的支撑绝缘膜并且在其中具有沟槽。 下电极位于沟槽的侧壁和底表面上。 种子导电膜覆盖下电极。 在支撑绝缘膜和种子导电膜上设置铁电体膜，在铁电体膜上设置上电极。 下电极可以填充沟槽，并且铁电膜可以延伸到与种子导电膜相邻的种子导电膜和支撑绝缘膜上。