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公开(公告)号:US10516065B2
公开(公告)日:2019-12-24
申请号:US15642893
申请日:2017-07-06
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Frank Dieter Pfirsch , Hans-Joachim Schulze , Philipp Seng , Armin Willmeroth
IPC: H01L21/00 , H01L29/00 , H01L29/861 , H01L29/06 , H01L29/08 , H01L29/66 , H01L29/36 , H01L21/225 , H01L21/266 , H01L29/16 , H01L29/20 , H01L21/265
Abstract: A semiconductor device includes an anode doping region of a diode structure arranged in a semiconductor substrate. The anode doping region has a first conductivity type. The semiconductor device further includes a second conductivity type contact doping region having a second conductivity type. The second conductivity type contact doping region is arranged at a surface of the semiconductor substrate and surrounded in the semiconductor substrate by the anode doping region. The anode doping region includes a buried non-depletable portion. At least part of the buried non-depletable portion is located below the second conductivity type contact doping region in the semiconductor substrate.
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公开(公告)号:US20190296110A1
公开(公告)日:2019-09-26
申请号:US16358929
申请日:2019-03-20
Applicant: Infineon Technologies AG
Inventor: Andreas Meiser , Anton Mauder , Roland Rupp , Oana Julia Spulber
IPC: H01L29/16 , H01L29/78 , H01L29/06 , H01L29/10 , H01L29/08 , H01L29/66 , H01L21/225 , H01L29/423
Abstract: A semiconductor device includes trench gate structures that extend from a first surface into a silicon carbide portion. A shielding region between a drift zone and the trench gate structures along a vertical direction orthogonal to the first surface forms an auxiliary pn junction with the drift zone. Channel regions and the trench gate structures are successively arranged along a first horizontal direction. The channel regions are arranged between a source region and a current spread region along a second horizontal direction orthogonal to the first horizontal direction. Portions of mesa sections between neighboring trench gate structures fully deplete at a gate voltage within an absolute maximum rating of the semiconductor device.
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公开(公告)号:US20190279922A1
公开(公告)日:2019-09-12
申请号:US16296392
申请日:2019-03-08
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Hans-Joachim Schulze
IPC: H01L23/495 , H01L23/00 , H01L23/31 , H01L21/48
Abstract: A semiconductor device includes a bonding pad that includes a base portion having a base layer. A bond wire or clip is bonded to a bonding region of a main surface of the bonding pad. A supplemental structure is in direct contact with the base portion next to the bonding region. A specific heat capacity of the supplemental structure is higher than a specific heat capacity of the base layer.
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公开(公告)号:US10366895B2
公开(公告)日:2019-07-30
申请号:US15687874
申请日:2017-08-28
Applicant: Infineon Technologies AG
Inventor: Johannes Georg Laven , Anton Mauder , Hans-Joachim Schulze , Werner Schustereder
IPC: H01L21/28 , H01L21/311 , H01L21/3213 , H01L29/423 , H01J37/00 , H01L21/265 , H01L29/739 , H01L29/78
Abstract: A semiconductor device and method is disclosed. In one example, the method for forming a semiconductor device includes forming a trench extending from a front side surface of a semiconductor substrate into the semiconductor substrate. The method includes forming of material to be structured inside the trench. Material to be structured is irradiated with a tilted reactive ion beam at a non-orthogonal angle with respect to the front side surface such that an undesired portion of the material to be structured is removed due to the irradiation with the tilted reactive ion beam while an irradiation of another portion of the material to be structured is masked by an edge of the trench.
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公开(公告)号:US20190158084A1
公开(公告)日:2019-05-23
申请号:US16194013
申请日:2018-11-16
Applicant: Infineon Technologies AG
Inventor: Werner Roessler , Anton Mauder
IPC: H03K17/567 , H03K17/687
Abstract: A method and an electronic circuit are disclosed. The method includes driving a transistor device in an on-state by applying a drive voltage higher than a threshold voltage of the transistor device to a drive input, and adjusting a voltage level of the drive voltage based on a load signal that represents a current level of a load current through the transistor device, wherein the current level is an actual current level or an expected current level of the load current.
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公开(公告)号:US10256299B2
公开(公告)日:2019-04-09
申请号:US15675913
申请日:2017-08-14
Applicant: Infineon Technologies AG
Inventor: Alexander Philippou , Anton Mauder
IPC: H01L29/84 , H01L29/06 , H01L21/02 , H01L21/311 , H01L27/06 , H01L29/10 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/739 , H01L29/78
Abstract: A power semiconductor device includes a semiconductor-on-insulator island having a semiconductor region and an insulation structure, the insulation structure being formed by an oxide and separating the semiconductor region from a portion of a semiconductor body of the power semiconductor device. The insulation structure includes a sidewall that laterally confines the semiconductor region; a bottom that vertically confines the semiconductor region; and a local deepening that forms at least a part of a transition between the sidewall and the bottom, wherein the local deepening extends further along the extension direction as compared to the bottom.
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公开(公告)号:US10254327B2
公开(公告)日:2019-04-09
申请号:US15058632
申请日:2016-03-02
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Stefan Hain , Mark-Matthias Bakran
IPC: G05F1/573 , G01R31/02 , H03K17/082 , G01R31/327 , G01R31/27 , H03K17/0812 , G01R31/42
Abstract: Devices and methods are provided, which detect a short circuit condition related to a semiconductor switch. A short circuit condition may be determined when a control signal of the switch exceeds a first reference, and a change of load current of the switch exceeds a second reference.
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公开(公告)号:US20180366464A1
公开(公告)日:2018-12-20
申请号:US16116463
申请日:2018-08-29
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Franz-Josef Niedernostheide , Christian Philipp Sandow
IPC: H01L27/088 , H01L29/10 , H01L29/423 , H03K17/687 , H01L29/739 , H01L29/78 , H01L29/49
CPC classification number: H01L27/0883 , H01L29/0692 , H01L29/0696 , H01L29/1037 , H01L29/1045 , H01L29/405 , H01L29/4238 , H01L29/49 , H01L29/7391 , H01L29/7396 , H01L29/7397 , H01L29/7802 , H01L29/7804 , H01L29/7811 , H01L29/7813 , H03K17/687
Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminal structures, and first and second cells each configured for controlling a load current and electrically connected to the first load terminal structure and to a drift region. A first mesa in the first cell includes a port region electrically connected to the first load terminal structure, and a first channel region coupled to the drift region. A second mesa included in the second cell includes a port region electrically connected to the first load terminal structure, and a second channel region coupled to the drift region. The mesas are spatially confined in a direction perpendicular to a direction of the load current by an insulation structure, and have a total extension of less than 100 nm in that direction. The first channel region includes an inversion channel. The second channel region includes an accumulation channel.
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公开(公告)号:US10134835B2
公开(公告)日:2018-11-20
申请号:US15634720
申请日:2017-06-27
Applicant: Infineon Technologies AG
Inventor: Anton Mauder , Franz-Josef Niedernostheide , Frank Dieter Pfirsch , Christian Philipp Sandow
IPC: H03K3/00 , H01L29/06 , H01L29/10 , H01L29/739 , H01L29/78 , H03K17/567
Abstract: A power semiconductor device is disclosed. The device includes a semiconductor body coupled to a first load terminal structure and a second load terminal structure, a first cell and a second cell. A first mesa is included in the first cell, the first mesa including: a first port region and a first channel region. A second mesa included in the second cell, the second mesa including a second port region. A third cell is electrically connected to the second load terminal structure and electrically connected to a drift region. The third cell includes a third mesa comprising: a third port region, a third channel region, and a third control electrode.
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公开(公告)号:US20180277637A1
公开(公告)日:2018-09-27
申请号:US15934518
申请日:2018-03-23
Applicant: Infineon Technologies AG
Inventor: Andreas Meiser , Caspar Leendertz , Anton Mauder , Roland Rupp
Abstract: A semiconductor device includes a trench structure extending from a first surface into a silicon carbide semiconductor body. The trench structure includes an auxiliary electrode at a bottom of the trench structure and a gate electrode arranged between the auxiliary electrode and the first surface. A shielding region adjoins the auxiliary electrode at the bottom of the trench structure and forms a first pn junction with a drift structure. A corresponding method of manufacturing the semiconductor device is also described.
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