公开(公告)号：US10606751B2

公开(公告)日：2020-03-31

申请号：US15201348

申请日：2016-07-01

Applicant: INTEL CORPORATION

Inventor： Andrew Cunningham ,  Mark D. Gray ,  Alexander Leckey ,  Chris MacNamara ,  Stephen T. Palermo ,  Pierre Laurent ,  Niall D. McDonnell ,  Tomasz Kantecki ,  Patrick Fleming

IPC: G06F12/0811 ,  G06F12/0831

Abstract: An input/output (I/O) device arranged to receive an information element including a payload, determine control information from the information element, classify the information element based on the control information, and issue a write to one of a plurality of computer-readable media based on the classification of the information element, the write to cause the payload to be written to the one of the plurality of computer-readable media.

公开(公告)号：US20190041957A1

公开(公告)日：2019-02-07

申请号：US15951391

申请日：2018-04-12

Applicant: Intel Corporation

Inventor： David Hunt ,  Niall Power ,  Kevin Devey ,  Changzheng Wei ,  Bruce Richardson ,  Eliezer Tamir ,  Andrew Cunningham ,  Chris MacNamara ,  Nemanja Marjanovic ,  Rory Sexton ,  John Browne

IPC: G06F1/32

Abstract: Technologies for providing efficient detection of idle poll loops include a compute device. The compute device has a compute engine that includes a plurality of cores and a memory. The compute engine is to determine a ratio of unsuccessful operations to successful operations over a predefined time period of a core of the plurality cores that is assigned to continually poll, within the predefined time period, a memory address for a change in status and determine whether the determined ratio satisfies a reference ratio of unsuccessful operations to successful operations. The reference ratio is indicative of a change in the operation of the assigned core. The compute engine is further to selectively increase or decrease a power usage of the assigned core as a function of whether the determined ratio satisfies the reference ratio. Other embodiments are also described and claimed.

公开(公告)号：US11474879B2

公开(公告)日：2022-10-18

申请号：US17032623

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Eliezer Tamir ,  Johannes Berg ,  Andrew Cunningham ,  Peter Waskiewicz, Jr. ,  Andrey Chilikin

IPC: G06F9/50 ,  G06F9/48 ,  H04L69/22 ,  H04L47/10 ,  G06F9/4401 ,  H04L49/00 ,  H04L45/74 ,  H04L9/40

Abstract: Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.

公开(公告)号：US11474878B2

公开(公告)日：2022-10-18

申请号：US16933121

申请日：2020-07-20

Applicant: Intel Corporation

Inventor： Eliezer Tamir ,  Johannes Berg ,  Andrew Cunningham ,  Peter Waskiewicz, Jr. ,  Andrey Chilikin

IPC: G06F9/50 ,  G06F9/48 ,  H04L69/22 ,  H04L47/10 ,  G06F9/4401 ,  H04L49/00 ,  H04L45/74 ,  H04L9/40

Abstract: Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.

公开(公告)号：US20210385720A1

公开(公告)日：2021-12-09

申请号：US17184832

申请日：2021-02-25

Applicant: Intel Corporation

Inventor： Jonas Svennebring ,  Niall D. McDonnell ,  Andrey Chilikin ,  Andrew Cunningham ,  Christopher MacNamara ,  Carl-Oscar Montelius ,  Eliezer Tamir ,  Bjorn Topel

IPC: H04W36/30 ,  H04W36/32 ,  H04L12/715 ,  H04W76/27 ,  H04L12/717 ,  H04W40/18

Abstract: Aspects of data re-direction are described, which can include software-defined networking (SDN) data re-direction operations. Some aspects include data re-direction operations performed by one or more virtualized network functions. In some aspects, a network router decodes an indication of a handover of a user equipment (UE) from a first end point (EP) to a second EP, based on the indication, the router can update a relocation table including the UE identifier, an identifier of the first EP, and an identifier of the second EP. The router can receive a data packet for the UE, configured for transmission to the first EP, and modify the data packet, based on the relocation table, for rerouting to the second EP. In some aspects, the router can decode handover prediction information, including an indication of a predicted future geographic location of the UE, and update the relocation table based on the handover prediction information.

公开(公告)号：US20210117191A1

公开(公告)日：2021-04-22

申请号：US17133305

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Andrew Cunningham ,  Patrick Fleming ,  Naveen Lakkakula ,  Richard Guerin ,  Charitra Sankar ,  Stephen Doyle ,  Ralph Castro ,  John Browne

IPC: G06F9/30 ,  G06F9/448 ,  G06F9/48 ,  G06F11/10

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.

公开(公告)号：US20210019197A1

公开(公告)日：2021-01-21

申请号：US17032623

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Eliezer Tamir ,  Johannes Berg ,  Andrew Cunningham ,  Peter Waskiewicz, JR. ,  Andrey Chilikin

IPC: G06F9/50 ,  G06F9/48 ,  H04L29/06 ,  H04L12/815 ,  H04L12/741 ,  H04L12/935 ,  G06F9/4401

Abstract: Examples include registering a device driver with an operating system, including registering available hardware offloads. The operating system receives a call to a hardware offload, inserts a binary filter representing the hardware offload into a hardware component and causes the execution of the binary filter by the hardware component when the hardware offload is available, and executes the binary filter in software when the hardware offload is not available.

公开(公告)号：US10445271B2

公开(公告)日：2019-10-15

申请号：US14987676

申请日：2016-01-04

Applicant: Intel Corporation

Inventor： Ren Wang ,  Namakkal N. Venkatesan ,  Debra Bernstein ,  Edwin Verplanke ,  Stephen R. Van Doren ,  An Yan ,  Andrew Cunningham ,  David Sonnier ,  Gage Eads ,  James T. Clee ,  Jamison D. Whitesell ,  Yipeng Wang ,  Jerry Pirog ,  Jonathan Kenny ,  Joseph R. Hasting ,  Narender Vangati ,  Stephen Miller ,  Te K. Ma ,  William Burroughs ,  Andrew J. Herdrich ,  Jr-Shian Tsai ,  Tsung-Yuan C. Tai ,  Niall D. McDonnell ,  Hugh Wilkinson ,  Bradley A. Burres ,  Bruce Richardson

IPC: G06F13/37 ,  G06F12/0811 ,  G06F13/16 ,  G06F12/0868 ,  G06F12/04 ,  G06F9/38

Abstract: Apparatus and methods implementing a hardware queue management device for reducing inter-core data transfer overhead by offloading request management and data coherency tasks from the CPU cores. The apparatus include multi-core processors, a shared L3 or last-level cache (“LLC”), and a hardware queue management device to receive, store, and process inter-core data transfer requests. The hardware queue management device further comprises a resource management system to control the rate in which the cores may submit requests to reduce core stalls and dropped requests. Additionally, software instructions are introduced to optimize communication between the cores and the queue management device.

公开(公告)号：US20190044879A1

公开(公告)日：2019-02-07

申请号：US16023743

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Bruce Richardson ,  Andrew Cunningham ,  Alexander J. Leckey ,  Brendan Ryan ,  Patrick Fleming ,  Patrick Connor ,  David Hunt ,  Andrey Chilikin ,  Chris MacNamara

IPC: H04L12/863 ,  H04L12/935 ,  H04L12/861 ,  H04L12/801

Abstract: Technologies for reordering network packets on egress include a network interface controller (NIC) configured to associate a received network packet with a descriptor, generate a sequence identifier for the received network packet, and insert the generated sequence identifier into the associated descriptor. The NIC is further configured to determine whether the received network packet is to be transmitted from a compute device associated with the NIC to another compute device and insert, in response to a determination that the received network packet is to be transmitted to the another compute device, the descriptor into a transmission queue of descriptors. Additionally, the NIC is configured to transmit the network packet based on position of the descriptor in the transmission queue of descriptors based on the generated sequence identifier. Other embodiments are described herein.

公开(公告)号：US20240039860A1

公开(公告)日：2024-02-01

申请号：US18478589

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Raju Arvind ,  Amit Baxi ,  Dave Cavalcanti ,  Trevor Cooper ,  Andrew Cunningham ,  Francesc Guim Bernat ,  Ravindra Hegde ,  Gowtham Hosamane ,  Karthik Kumar ,  Patrick Kutch ,  Susruth Sudhakaran

IPC: H04L47/32 ,  H04L47/10

CPC classification number: H04L47/32 ,  H04L47/29

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed. An example apparatus disclosed herein is to determine whether to drop a data packet of a data stream or forward the data packet based on (a) a payload of the data packet and (b) historic information associated with the data stream. The example apparatus is also to operate on the data packet based on the determination.