公开(公告)号：US20250022768A1

公开(公告)日：2025-01-16

申请号：US18903523

申请日：2024-10-01

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng

IPC: H01L23/373 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/433

Abstract: A method of forming a chip package is provided. The method may include: arranging an elastic thermal interface material over a semiconductor chip, the elastic thermal interface material being configured to transfer heat from the chip to an outside; arranging a mold around the elastic thermal interface material and at least partially around the semiconductor chip, thereby compressing the elastic thermal interface material with the mold; and filling the mold with a packaging material.

公开(公告)号：US12136583B2

公开(公告)日：2024-11-05

申请号：US17519805

申请日：2021-11-05

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng

IPC: H01L23/34 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L23/433

Abstract: A method of forming a chip package is provided. The method may include: arranging an elastic thermal interface material over a semiconductor chip, wherein the elastic thermal interface material may be configured to transfer heat from the chip to an outside; arranging a mold around the thermal interface material and at least partially around the semiconductor chip, thereby compressing the elastic thermal interface material with the mold; and filling the mold with a packaging material.

公开(公告)号：US11676879B2

公开(公告)日：2023-06-13

申请号：US17034109

申请日：2020-09-28

Applicant: Infineon Technologies AG

Inventor： Stefan Woetzel ,  Chee Yang Ng

IPC: H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/367 ,  H01L21/4871 ,  H01L21/565 ,  H01L21/78 ,  H01L23/296 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/49844 ,  H01L24/32 ,  H01L2224/32155 ,  H01L2224/32175 ,  H01L2924/0715 ,  H01L2924/1033 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/15763 ,  H01L2924/181 ,  H01L2924/1815

Abstract: A semiconductor package includes: a carrier having a first side and a second side opposite the first side, the first side having a plurality of contact structures; a semiconductor die having a first side and a second side opposite the first side, the first side of the semiconductor die having a plurality of pads attached to the plurality of contact structures at the first side of the carrier; a metal plate attached to the second side of the semiconductor die, the metal plate having a size that is independent of the size of the carrier and based on an expected thermal load to be presented by the semiconductor die; and an encapsulant confined by the carrier and the metal plate and laterally surrounding an edge of the semiconductor die. Corresponding methods of production are also provided.

公开(公告)号：US11174152B2

公开(公告)日：2021-11-16

申请号：US16659936

申请日：2019-10-22

Applicant: Infineon Technologies AG

Inventor： Sook Woon Chan ,  Chau Fatt Chiang ,  Kok Yau Chua ,  Swee Kah Lee ,  Chee Yang Ng

IPC: B81B7/00 ,  H04R31/00 ,  H04R19/04 ,  H04R19/00 ,  B81B7/02 ,  B81C1/00 ,  G01L19/00 ,  H01L29/84 ,  H04R1/08 ,  H04R1/04

Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.

公开(公告)号：US10770399B2

公开(公告)日：2020-09-08

申请号：US16274991

申请日：2019-02-13

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng ,  Hock Siang Chua ,  Stefan Macheiner ,  Josef Maerz ,  Nurfarena Othman ,  Joseph Victor Soosai Prakasam ,  Hong Hock Tay

IPC: H01L23/538 ,  H01L23/00 ,  H01L25/16 ,  H01L23/498 ,  H01L23/373 ,  H01L23/31 ,  H01L21/48 ,  H01L23/367 ,  H01L23/13 ,  H01L21/56

Abstract: A semiconductor package includes a frame having an insulative body with a first main surface and a second main surface opposite the first main surface, a first plurality of metal traces at the first main surface, and a first cavity in the insulative body. A thermally and/or electrically conductive material filling the first cavity in the insulative body and having a different composition than the first plurality of metal traces. The thermally and/or electrically conductive material provides a thermally and/or electrically conductive path between the first and the second main surfaces of the insulative body. A semiconductor die attached to the frame at the first main surface of the insulative body is electrically connected to the first plurality of metal traces and to the thermally and/or electrically conductive material filling the first cavity in the insulative body. A corresponding method of manufacture is also described.

公开(公告)号：US10304780B2

公开(公告)日：2019-05-28

申请号：US16025338

申请日：2018-07-02

Applicant: Infineon Technologies AG

Inventor： Chau Fatt Chiang ,  Kok Yau Chua ,  Swee Kah Lee ,  Chee Yang Ng ,  Valentyn Solomko

IPC: H01L23/49 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00

Abstract: A device includes a substrate that includes conductive structures and has a first surface that is opposite to a second surface. Conductive pillars are built up over and electrically coupled to at least one of the conductive structures. An integrated circuit is disposed over the first surface and electrically coupled to the conductive structures. A molding compound is formed over the first surface of the substrate.

公开(公告)号：US20220102263A1

公开(公告)日：2022-03-31

申请号：US17459296

申请日：2021-08-27

Applicant: Infineon Technologies AG

Inventor： Chee Yang Ng ,  Stefan Woetzel ,  Edward Fuergut ,  Thai Kee Gan ,  Chee Hong Lee ,  Jayaganasan Narayanasamy ,  Ralf Otremba

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor package includes: a carrier having an electrically insulative body and a first contact structure at a first side of the electrically insulative body; and a semiconductor die having a first pad attached to the first contact structure of the carrier, the first pad being at source or emitter potential. The first pad is spaced inward from an edge of the semiconductor die by a first distance. The semiconductor die has an edge termination region between the edge and the first pad. The first contact structure of the carrier is spaced inward from the edge of the semiconductor die by a second distance greater than the first distance such that an electric field that emanates from the edge termination region in a direction of the carrier during normal operation of the semiconductor die does not reach the first contact structure of the carrier. Methods of production are also provided.

公开(公告)号：US20210193560A1

公开(公告)日：2021-06-24

申请号：US16718443

申请日：2019-12-18

Applicant: Infineon Technologies AG

Inventor： Stuart Cardwell ,  Chee Yang Ng ,  Josef Maerz ,  Clive O'Dell ,  Mark Pavier

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/522

Abstract: A semiconductor device includes a conductive frame comprising a die attach surface that is substantially planar, a semiconductor die comprising a first load on a rear surface and a second terminal disposed on a main surface, a first conductive contact structure disposed on the die attach surface, and a second conductive contact structure on the main surface. The first conductive contact structure vertically extends past a plane of the main surface of the semiconductor die. The first conductive contact structure is electrically isolated from the main surface of the semiconductor die by an electrical isolation structure. An upper surface of the electrical isolation structure is below the main surface of the semiconductor die.

公开(公告)号：US11039231B2

公开(公告)日：2021-06-15

申请号：US16682468

申请日：2019-11-13

Applicant: Infineon Technologies AG

Inventor： Kok Yau Chua ,  Chee Yang Ng

IPC: H04R1/02 ,  G01S13/86 ,  G10L15/22 ,  H04R3/00 ,  H04R31/00

Abstract: In accordance with an embodiment a package includes: a package structure which defines inner surfaces delimiting an inner volume and outer surfaces directed towards an exterior of the package; at least one acoustic sensor element applied to at least one of the inner surfaces, to convert acoustic waves arriving from the exterior of the package into acoustic information in the form of electric signals; a plurality of millimeter wave sensing elements applied to at least one of the outer surfaces, to receive reflected radar signals from objects in the exterior of the package; and a circuitry applied to at least one of the inner surfaces of the package structure, wherein the circuitry is electrically connected to the at least one acoustic sensor element and the plurality of millimeter wave sensing elements to process the acoustic information and the reflected radar signals.

公开(公告)号：US10549985B2

公开(公告)日：2020-02-04

申请号：US15692938

申请日：2017-08-31

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Matthias Steiert ,  Chau Fatt Chiang ,  Christian Geissler ,  Bernd Goller ,  Thomas Kilger ,  Johannes Lodermeyer ,  Franz-Xaver Muehlbauer ,  Chee Yang Ng ,  Beng Keh See ,  Claus Waechter

IPC: B81B7/00 ,  B81C1/00

Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.