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公开(公告)号:US20130210198A1
公开(公告)日:2013-08-15
申请号:US13370477
申请日:2012-02-10
申请人: Jing-Cheng LIN
发明人: Jing-Cheng LIN
IPC分类号: H01L21/56
CPC分类号: H01L21/561 , H01L21/486 , H01L21/568 , H01L23/3128 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L25/0655 , H01L2224/16227 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73204 , H01L2224/97 , H01L2924/15311 , H01L2924/157 , H01L2924/18161 , H01L2224/83 , H01L2224/81
摘要: A method for forming a semiconductor structure. A semiconductor substrate including a plurality of dies mounted thereon is provided. The substrate includes a first portion proximate to the dies and a second portion distal to the dies. In some embodiments, the first portion may include front side metallization. The second portion of the substrate is thinned and a plurality of conductive through substrate vias (TSVs) is formed in the second portion of the substrate after the thinning operation. Prior to thinning, the second portion may not contain metallization. In one embodiment, the substrate may be a silicon interposer. Further back side metallization may be formed to electrically connect the TSVs to other packaging substrates or printed circuit boards.
摘要翻译: 一种形成半导体结构的方法。 提供了包括安装在其上的多个管芯的半导体基板。 衬底包括靠近模具的第一部分和远离模具的第二部分。 在一些实施例中,第一部分可以包括前侧金属化。 衬底的第二部分变薄,并且在变薄操作之后,在衬底的第二部分中形成多个导电贯通衬底通孔(TSV)。 在变薄之前,第二部分可以不包含金属化。 在一个实施例中,衬底可以是硅插入器。 可以形成另外的背侧金属化以将TSV电连接到其他封装基板或印刷电路板。
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公开(公告)号:US20130134582A1
公开(公告)日:2013-05-30
申请号:US13427753
申请日:2012-03-22
申请人: Chen-Hua YU , Jing-Cheng LIN
发明人: Chen-Hua YU , Jing-Cheng LIN
CPC分类号: H01L24/17 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L25/0655 , H01L25/18 , H01L25/50 , H01L2224/0401 , H01L2224/13083 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13166 , H01L2224/13181 , H01L2224/13564 , H01L2224/1412 , H01L2224/14177 , H01L2224/14181 , H01L2224/14505 , H01L2224/16145 , H01L2224/16238 , H01L2224/81193 , H01L2224/81815 , H01L2924/01028 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/381
摘要: The mechanisms for forming a multi-chip package described enable chips with different bump sizes being packaged to a common substrate. A chip with larger bumps can be bonded with two or more smaller bumps on a substrate. Conversely, two or more small bumps on a chip may be bonded with a large bump on a substrate. By allowing bumps with different sizes to be bonded together, chips with different bump sizes can be packaged together to form a multi-chip package.
摘要翻译: 用于形成描述的多芯片封装的机构使得具有不同凸块尺寸的芯片被封装到公共衬底。 具有较大凸块的芯片可以与衬底上的两个或更多个更小的凸块接合。 相反,芯片上的两个或更多个小凸块可以与基板上的大凸块粘合。 通过允许具有不同尺寸的凸块结合在一起,具有不同凸块尺寸的芯片可以封装在一起以形成多芯片封装。
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13.
公开(公告)号:US20130026620A1
公开(公告)日:2013-01-31
申请号:US13192756
申请日:2011-07-28
申请人: Cheng-Lin HUANG , I-Ting CHEN , Ying Ching SHIH , Po-Hao TSAI , Szu Wei LU , Jing-Cheng LIN , Shin-Puu JENG , Chen-Hua YU
发明人: Cheng-Lin HUANG , I-Ting CHEN , Ying Ching SHIH , Po-Hao TSAI , Szu Wei LU , Jing-Cheng LIN , Shin-Puu JENG , Chen-Hua YU
IPC分类号: H01L23/498 , H01L21/60
CPC分类号: H01L24/14 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/17 , H01L24/81 , H01L2224/0346 , H01L2224/03912 , H01L2224/0401 , H01L2224/1146 , H01L2224/11462 , H01L2224/11472 , H01L2224/1161 , H01L2224/11622 , H01L2224/13011 , H01L2224/13014 , H01L2224/13078 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/1405 , H01L2224/14051 , H01L2224/145 , H01L2224/16238 , H01L2224/17107 , H01L2224/81141 , H01L2224/81193 , H01L2224/81815 , H01L2224/81897 , H01L2924/1305 , H01L2924/1306 , H01L2924/00014 , H01L2924/01047 , H01L2924/01082 , H01L2924/01029 , H01L2924/0103 , H01L2924/01083 , H01L2924/01053 , H01L2924/01079 , H01L2924/01051 , H01L2924/014 , H01L2924/00012 , H01L2924/00
摘要: The disclosure relates to a conductive bump structure of a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate comprising a major surface and conductive bumps distributed over the major surface of the substrate. Each of a first subset of the conductive bumps comprise a regular body, and each of a second subset of the conductive bumps comprise a ring-shaped body.
摘要翻译: 本发明涉及半导体器件的导电凸块结构。 半导体器件的示例性结构包括包括主表面的衬底和分布在衬底的主表面上的导电凸块。 导电凸块的第一子集中的每一个包括规则体,并且导电凸块的第二子集中的每一个包括环形体。
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