公开(公告)号：US20210407867A1

公开(公告)日：2021-12-30

申请号：US17467839

申请日：2021-09-07

Applicant: KABUSHIKI KAISHA TOSHIBA ,  Kioxia Corporation

Inventor： Fuyuma ITO ,  Yasuhito YOSHIMIZU ,  Nobuhito KUGE ,  Yui KAGI ,  Susumu OBATA ,  Keiichiro MATSUO ,  Mitsuo SANO

IPC: H01L21/66 ,  H01L27/11582

Abstract: A semiconductor wafer includes a surface having at least one recess including an inner wall surface. The inner wall surface is exposed.

公开(公告)号：US20210083001A1

公开(公告)日：2021-03-18

申请号：US17005438

申请日：2020-08-28

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU

IPC: H01L27/22 ,  G11C11/16

Abstract: According to one embodiment, a magnetic memory device includes: a plurality of first films and a plurality of second films stacked alternately; a first insulating layer passing through the plurality of first and second films; a second insulating layer passing through the plurality of first and second films and in contact with a surface of the first insulating layer; a first magnet including a first pillar portion provided between the second insulating layer and the plurality of first and second films, and a first terrace portion coupled to one end of the first pillar portion; a first interconnect layer coupled to the other end of the first pillar portion of the first magnet; and a first magnetoresistance effect element coupled to the first terrace portion of the first magnet.

公开(公告)号：US20240428875A1

公开(公告)日：2024-12-26

申请号：US18749161

申请日：2024-06-20

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Hitomi TANAKA ,  Hajime SANO ,  Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Kazuma HASEGAWA

IPC: G11C29/38 ,  G06F13/16

Abstract: A system includes a rack, a heat treatment device configured to perform a heat treatment, one or more conveyance devices, and a host. The host is configured to determine a target memory chip to be subjected to the heat treatment by the heat treatment device among memory chips in a plurality of drives mounted on the rack, and disable communication with a target drive on which the target memory chip is mounted. The host is configured to control the conveyance devices to dismount the target drive from the rack, detach a component including the target memory chip from the target drive, convey the detached component to the heat treatment device, reattach the component including the target memory chip that has undergone the heat treatment to a drive, and mount the drive with the component including the target memory chip that has undergone the heat treatment on the rack.

公开(公告)号：US20240164102A1

公开(公告)日：2024-05-16

申请号：US18393002

申请日：2023-12-21

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Hiroshi NAKAKI

IPC: H10B43/27 ,  H01L23/00 ,  H01L23/522 ,  H01L25/065 ,  H01L25/18 ,  H10B41/27

CPC classification number: H10B43/27 ,  H01L23/5226 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/18 ,  H10B41/27 ,  H01L2224/08145 ,  H01L2924/1431 ,  H01L2924/14511

Abstract: A semiconductor storage device includes first and second stacks, and first to fourth semiconductor layers. The first stack includes first conductive layers and first insulating layers alternately stacked in a first direction. The first semiconductor layer extends through the first stack. The second semiconductor layer extends in a second direction above the first stack and connected to the first semiconductor layer. The second stack includes second conductive layers and second insulating layers alternately stacked in the first direction. The first and second stacks are arranged in a third direction. The third semiconductor layer extends through the second stack. The fourth semiconductor layer extends in the second direction above the second stack and connected to the third semiconductor layer. A third conductive layer is in contact with upper surfaces of the second and fourth semiconductor layers. The second and fourth semiconductor layers are separated from each other in the third direction.

公开(公告)号：US20240014062A1

公开(公告)日：2024-01-11

申请号：US18371669

申请日：2023-09-22

Applicant: Kioxia Corporation

Inventor： Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Arata INOUE ,  Hiroyuki DOHMAE ,  Kazuhito HAYASAKA ,  Tomoya SANUKI

IPC: H01L21/677

CPC classification number: H01L21/67781 ,  H01L21/67766 ,  H01L21/67769 ,  H01L21/6773 ,  H01L21/68

Abstract: According to one embodiment, when a first case-mounted memory device that includes a first memory device is not connected to a slot of a host apparatus and is stored in a second stocker, the host apparatus causes a second transport device to transport the first case-mounted memory device to the slot, and to connect it thereto. When the first case-mounted memory device is not connected to the slot and is not stored in the second stocker, the host apparatus causes a first transport device to transport the first memory device from a first stocker to a mounter, causes the mounter to mount the first memory device in a case, and causes the second transport device to transport the first case-mounted memory device to the slot and to connect it thereto.

公开(公告)号：US20240014061A1

公开(公告)日：2024-01-11

申请号：US18371536

申请日：2023-09-22

Applicant: Kioxia Corporation

Inventor： Tatsuro HITOMI ,  Yasuhito YOSHIMIZU ,  Arata INOUE ,  Hiroyuki DOHMAE ,  Kazuhito HAYASAKA ,  Tomoya SANUKI

IPC: H01L21/677 ,  H01L21/67 ,  G01R1/073 ,  G01R1/067 ,  H01L21/66

CPC classification number: H01L21/67769 ,  H01L21/67248 ,  H01L21/67781 ,  H01L21/6773 ,  G01R1/07314 ,  G01R1/06755 ,  H01L22/32

Abstract: According to one embodiment, a cassette housing includes a storage unit, a probe card, and a container. The storage unit stores a semiconductor wafer including a plurality of nonvolatile memory chips. The probe card includes a probe. The probe is configured to be brought into contact with a pad electrode provided on the semiconductor wafer. The container contains heat transfer fluid for lowering or raising temperature of one or both of the probe card and the semiconductor wafer stored in the storage unit.

公开(公告)号：US20220302024A1

公开(公告)日：2022-09-22

申请号：US17470529

申请日：2021-09-09

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Kaori UMEZAWA ,  Kosuke TAKAI

IPC: H01L23/522 ,  H01L27/11582 ,  H01L27/11556 ,  H01L29/423 ,  H01L23/00 ,  H01L21/033

Abstract: A semiconductor device includes a substrate, a first stacked film and a second stacked film each including insulating layers and electrode layers alternately provided on the substrate, and columnar portions provided in the insulating layers and electrode layers of the first stacked film, and including charge storage layers and semiconductor layers. The second stacked film further includes an insulator including first and second lower faces, the first lower face is inclined by a first angle to an upper face of one of the electrode layers in the first stacked film, the second lower face is inclined by a second angle to the upper face of the one of the electrode layers in the first stacked film, and the second angle is less than the first angle. The insulating layers and electrode layers in the second stacked film are provided below the first and second lower faces of the insulator.

公开(公告)号：US20220301625A1

公开(公告)日：2022-09-22

申请号：US17474904

申请日：2021-09-14

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Yasuhito YOSHIMIZU ,  Keisuke NAKATSUKA ,  Hideto HORII ,  Takashi MAEDA

IPC: G11C16/04 ,  G11C16/30 ,  G11C16/32 ,  G11C16/10 ,  G11C16/26 ,  G11C5/02 ,  G11C5/06

Abstract: A memory system has a memory cell array having a plurality of strings, the plurality of strings each having a plurality of memory cells connected in series, and a controller configured to perform control of transferring charges to be stored in the plurality of memory cells in the string or transferring charges according to stored data, between potential wells of channels in the plurality of memory cells.

公开(公告)号：US20220204270A1

公开(公告)日：2022-06-30

申请号：US17694532

申请日：2022-03-14

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Takashi FUKUSHIMA ,  Tatsuro HITOMI ,  Arata INOUE ,  Masayuki MIURA ,  Shinichi KANNO ,  Toshio FUJISAWA ,  Keisuke NAKATSUKA ,  Tomoya SANUKI

IPC: B65G1/137

Abstract: According to one embodiment, a storage device includes a control apparatus and a stocker. The control apparatus writes data to or reads data from a storage medium that includes a plurality of non-volatile memory chips. The stocker stores a plurality of the storage media that are detached from the control apparatus. The control apparatus includes a first temperature control system. The first temperature control system raises temperature of the storage medium to a first temperature or higher. The stocker includes a second temperature control system. The second temperature control system cools the storage medium to a second temperature or lower. The second temperature is lower than the first temperature.

公开(公告)号：US20220091772A1

公开(公告)日：2022-03-24

申请号：US17410674

申请日：2021-08-24

Applicant: KIOXIA CORPORATION

Inventor： Toshio FUJISAWA ,  Tomoya SANUKI ,  Hitomi TANAKA ,  Takeshi ISHIHARA ,  Yasuhito YOSHIMIZU

IPC: G06F3/06

Abstract: According to one embodiment, a memory system includes a non-volatile semiconductor memory with a plurality of blocks. A controller in the system controls the writing of data to the non-volatile semiconductor memory and includes a host I/F control interface to receive write command information including file allocation information indicating a location for write data, a file information management unit to assign an erasure level to a file and output a file identifier in which a file name, a file size, and the erasure level of the file are combined, and a flash translation layer unit to allocate each file on a single file per block basis based on the write command information and the file identifier.