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公开(公告)号：US20110093761A1
公开(公告)日：2011-04-21
申请号：US12975153
申请日：2010-12-21
CPC分类号： G06F12/0246 , G11C11/56 , G11C11/5628 , G11C11/5642 , G11C2211/5641
摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.
摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标充电水平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。
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12.发明授权公开(公告)号：US07535754B2
公开(公告)日：2009-05-19
申请号：US11264539
申请日：2005-11-01
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： A memory device and method of reading the memory device is disclosed. The memory device includes a first string of MRAM cells and a second string of MRAM cells. The first string of MRAM cells include a plurality of MRAM cells connected in series and the second string of MRAM cells include another plurality of MRAM cells connected in series. A common connection is controllably connectable to one end of the first string of MRAM cells, and to one end of the second string of MRAM cells.
摘要翻译： 公开了一种读取存储器件的存储器件和方法。 存储器件包括MRAM单元的第一串和MRAM单元的第二串。 MRAM单元的第一串包括串联连接的多个MRAM单元，并且第二串MRAM单元包括串联连接的另外多个MRAM单元。 公共连接可控地连接到MRAM单元的第一串的一端，并连接到第二串MRAM单元的一端。
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13.发明授权Atomic resolution storage device configured as a redundant array of independent storage devices 失效原子分辨率存储设备配置为独立存储设备的冗余阵列公开(公告)号：US06671778B2
公开(公告)日：2003-12-30
申请号：US09922436
申请日：2001-08-03
IPC分类号： G06F1200
CPC分类号： G06F3/0655 , G06F3/0625 , G06F3/0689 , G06F11/1076 , G06F2211/1042 , G11B9/10 , Y02D10/154
摘要： A redundant array of independent storage devices is disclosed herein. The redundant storage device includes one or more atomic resolution storage devices and a control system. The atomic resolution storage device is configured to communicate with the control system as a redundant array of independent storage devices. Each atomic resolution storage device is a non-volatile memory component including a plurality of electron emitters, a medium having medium partitions, and a plurality of micromovers wherein each micromover is independently operable to move a medium partition relative to one or more electron emitters for redundant reading and writing of data at the media.
摘要翻译： 本文公开了独立存储设备的冗余阵列。 冗余存储设备包括一个或多个原子分辨率存储设备和控制系统。 原子分辨率存储装置被配置为作为独立存储装置的冗余阵列与控制系统进行通信。 每个原子分辨率存储装置是包括多个电子发射器，具有介质分隔器的介质和多个小型的非易失性存储器组件，其中每个微型单元可独立地可操作以相对于一个或多个电子发射器移动介质分区用于冗余 在媒体上阅读和写入数据。
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公开(公告)号：US06590850B2
公开(公告)日：2003-07-08
申请号：US09800561
申请日：2001-03-07
IPC分类号： G11B700
摘要： An information storage unit functioning in a vacuum is provided wherein a data storage medium has an information storage area for storing and reading information thereon. An array of electron beam emitters is spaced from and in close proximity to the data storage medium for selectively directing a plurality of electron beams toward the data storage medium. Focusing optics between the array of electron beam emitters and the data storage medium focus each of the electron beams on one part of the information storage area of the data storage medium. A micro electromechanical motor associated with the data storage medium moves the data storage medium relative to the array of electron beam emitters, so that each of the emitters directs an electron beam selectively to a portion of the information storage area to read or write information therein. Electronic circuitry spaced from and in electronic communication with the array of electron beam emitters controls the operations of the array of electron beam emitters. A vacuum device in the information storage unit maintains the vacuum between the data storage medium and the array of electron beam emitters.
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15.发明授权公开(公告)号：US06317376B1
公开(公告)日：2001-11-13
申请号：US09598671
申请日：2000-06-20
申请人： Lung T. Tran , Kenneth J. Eldredge
发明人： Lung T. Tran , Kenneth J. Eldredge
IPC分类号： G11C702
摘要： A Magnetic Random Access Memory (“MRAM”) device includes an array of memory cells. The device generates reference signals that can be used to determine the resistance states of each memory cell in the array, despite variations in resistance due to manufacturing tolerances and other factors such as temperature gradients across the array, electromagnetic interference and aging.
摘要翻译： 磁性随机存取存储器（“MRAM”）装置包括一组存储单元。 该器件产生可用于确定阵列中每个存储单元的电阻状态的参考信号，尽管由于制造公差和其他因素（例如阵列上的温度梯度，电磁干扰和衰老）导致的电阻变化。
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公开(公告)号：US06262625B1
公开(公告)日：2001-07-17
申请号：US09430238
申请日：1999-10-29
IPC分类号： G01R1900
CPC分类号： B82Y10/00 , G11C11/15 , H03F1/304 , H03F3/45771 , H03F2203/45048 , H03F2203/45291 , H03F2203/45342 , H03F2203/45624 , H03F2203/45726
摘要： An operational amplifier includes transistors for providing a controlled current path. At least one of the transistors is in an isolated well in a substrate. Offset of the operational amplifier is corrected by applying a back gate bias voltage to at least one isolated well and changing impedance of the transistors. The proper back gate bias voltage and transistor impedance are determined by incrementally adjusting the back gate bias voltage and then incrementally adjusting the transistor impedance. Calibration values are stored in register memory. Such calibration may be performed by an auto offset calibration process.
摘要翻译： 运算放大器包括用于提供受控电流路径的晶体管。 至少一个晶体管处于衬底中的隔离阱中。 通过对至少一个隔离阱施加背栅偏置电压并改变晶体管的阻抗来校正运算放大器的偏移。 正确的背栅偏置电压和晶体管阻抗通过逐步调整背栅偏置电压然后逐渐调整晶体管阻抗来确定。 校准值存储在寄存器存储器中。 这种校准可以通过自动偏移校准过程来执行。
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公开(公告)号：US06188615B1
公开(公告)日：2001-02-13
申请号：US09430611
申请日：1999-10-29
IPC分类号： G11C1604
摘要： Resistance of a selected memory cell in a Magnetic Random Access Memory (“MRAM”) device is sensed by a read circuit including a direct injection charge amplifier, an integrator capacitor and a digital sense amplifier. The direct injection charge amplifier supplies current to the integrator capacitor while maintaining an equipotential voltage on non-selected memory cells in the MRAM device. As the direct injection charge amplifier applies a fixed voltage to the selected memory cell, the sense amplifier measures integration time of a signal on the integrator. The signal integration time indicates whether the memory cell MRAM resistance is at a first state (R) or a second state (R+&Dgr;R).
摘要翻译： 通过包括直接注入电荷放大器，积分器电容器和数字读出放大器的读取电路来检测磁性随机存取存储器（“MRAM”）器件中的所选存储单元的电阻。 直接注入电荷放大器向积分器电容器提供电流，同时在MRAM器件中的未选择的存储单元上保持等电位电压。 由于直接注入电荷放大器对所选择的存储单元施加固定电压，所以读出放大器测量积分器上信号的积分时间。 信号积分时间表示存储单元MRAM电阻是处于第一状态（R）还是第二状态（R + DELTAR）。
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公开(公告)号：US08650376B2
公开(公告)日：2014-02-11
申请号：US13543191
申请日：2012-07-06
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G11C11/56 , G11C11/5628 , G11C11/5642 , G11C2211/5641
摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.
摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标电荷电平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。
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公开(公告)号：US20080162791A1
公开(公告)日：2008-07-03
申请号：US11834565
申请日：2007-08-06
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G11C11/56 , G11C11/5628 , G11C11/5642 , G11C2211/5641
摘要： A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The apparatus includes a processing arrangement configured to access each of the memory cells in a write operation and a read operation. The apparatus also includes an instruction set for instructing the processor to impose target charge levels for defining a plurality of data values for each of the memory cells. The target charge levels are programmably movable with respect to the charge storage capacity.
摘要翻译： 一种使用闪存设备存储和检索数据的方法和系统。 一个示例系统包括闪存配置内的设备。 闪速存储器配置包括多个存储器单元，其中每个存储器单元具有用于实现数字存储器的电荷存储容量。 该装置包括配置成在写入操作和读取操作中访问每个存储器单元的处理装置。 该装置还包括用于指示处理器施加用于为每个存储器单元定义多个数据值的目标充电水平的指令集。 目标电荷电平可编程地相对于电荷存储容量移动。
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公开(公告)号：US06927996B2
公开(公告)日：2005-08-09
申请号：US10676465
申请日：2003-09-30
IPC分类号： G11C11/15 , G11C7/00 , G11C7/12 , G11C11/14 , G11C11/16 , H01L21/8246 , H01L27/105 , H01L43/08
摘要： A magnetic random access memory (MRAM) includes an array of magnetic memory cells arranged on a cross-point grid. Spurious voltages that build up on the stray wiring capacitance of unselected bit and word select lines are limited and discharged by diodes. The control of such spurious voltages improves device operating margins and allows the construction of larger arrays.
摘要翻译： 磁性随机存取存储器（MRAM）包括布置在交叉点网格上的磁存储器单元的阵列。 在未选择位和字选择线的杂散布线电容上形成的杂散电压受到二极管的限制和放电。 这种杂散电压的控制提高了器件工作裕度，并允许构建更大的阵列。
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