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    IMPROVED INTER-MEMORY MOVEMENT IN A MULTI-MEMORY SYSTEM
    12.
    发明申请
    IMPROVED INTER-MEMORY MOVEMENT IN A MULTI-MEMORY SYSTEM 有权

    公开(公告)号：US20250060898A1

    公开(公告)日：2025-02-20

    申请号：US18938866

    申请日：2024-11-06

    Applicant: Micron Technology, Inc.

    Inventor： Sourabh Dhir ,  Kang-Yong Kim

    IPC: G06F3/06

    Abstract: Methods, systems, and devices for improved inter-memory movement in a multi-memory system are described. A memory device may receive from a host device a command to move data from a first memory controlled by a first controller to a second memory controller by a second controller. The memory device may use the first and second controllers to facilitate the movement of the data from the first memory to the second memory via a path external to the host device. The memory device may indicate to the host device when to suspend activity to the first memory or the second memory and when to resume activity to the first memory or second memory.

    APPARATUSES AND SYSTEMS FOR PROVIDING POWER TO A MEMORY
    13.
    发明申请
    APPARATUSES AND SYSTEMS FOR PROVIDING POWER TO A MEMORY 有权

    公开(公告)号：US20220343963A1

    公开(公告)日：2022-10-27

    申请号：US17302206

    申请日：2021-04-27

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Hyun Yoo Lee ,  Kang-Yong Kim ,  Sourabh Dhir ,  Keun Soo Song

    IPC: G11C11/4074 ,  G11C5/14

    Abstract: In some examples, memory die may include a selection pad, which may be coupled to a power potential. The selection pad may provide a signal to a selection control circuit, which may control a selection circuit to couple a power pad to one of multiple power rails. In some examples, a power management integrated circuit may include a selection circuit to provide one power potential to a package including a memory die when a selection signal has a logic level and another power potential when the selection signal has another logic level.

    Structure of integrated circuitry and a method of forming a conductive via
    14.
    发明授权
    Structure of integrated circuitry and a method of forming a conductive via 有权

    公开(公告)号：US09960114B1

    公开(公告)日：2018-05-01

    申请号：US15585396

    申请日：2017-05-03

    Applicant: Micron Technology, Inc.

    Inventor： Sourabh Dhir ,  Andrew L. Li ,  Sanh D. Tang ,  Naoyoshi Kobayashi ,  Katsumi Koge

    IPC: H01L23/522 ,  H01L21/768

    CPC classification number: H01L21/76837 ,  H01L27/10814 ,  H01L27/10885

    Abstract: A method of forming a conductive via comprises forming a structure comprising an elevationally-extending-conductive via and a conductive line electrically coupled to and crossing above the conductive via. The conductive line comprises first conductive material and the conductive via comprises second conductive material of different composition from that of the first conductive material. The conductive line and the conductive via respectively having opposing sides in a vertical cross-section. First insulator material having k no greater than 4.0 is formed laterally outward of the opposing sides of the second conductive material of the conductive via selectively relative to the first conductive material of the opposing sides of the conductive line. The first insulator material is formed to a lateral thickness of at least 40 Angstroms in the vertical cross-section. Second insulator material having k greater than 4.0 is formed laterally outward of opposing sides of the first insulator material in the vertical cross-section. Additional method aspects, including structure independent of method of fabrication, are disclosed.

    Methods of forming contacts for a semiconductor device structure, and related methods of forming a semiconductor device structure
    15.
    发明授权
    Methods of forming contacts for a semiconductor device structure, and related methods of forming a semiconductor device structure 有权
    形成用于半导体器件结构的触点的方法以及形成半导体器件结构的相关方法

    公开(公告)号：US09564442B2

    公开(公告)日：2017-02-07

    申请号：US14681884

    申请日：2015-04-08

    Applicant: Micron Technology, Inc.

    Inventor： Sanh D. Tang ,  Wolfgang Mueller ,  Sourabh Dhir ,  Dylan R. MacMaster

    IPC: H01L21/8238 ,  H01L27/108 ,  H01L21/768 ,  H01L21/311 ,  H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L23/528

    CPC classification number: H01L27/10805 ,  H01L21/02068 ,  H01L21/31111 ,  H01L21/743 ,  H01L21/762 ,  H01L21/76831 ,  H01L21/76897 ,  H01L23/528 ,  H01L27/10808 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10891 ,  H01L29/0649 ,  H01L29/7391

    Abstract: A method of forming contacts for a semiconductor device structure comprises forming contact holes extending into neighboring semiconductive pillars and into a nitride material of nitride-capped electrodes. Composite structures are formed within the contact holes and comprise oxide structures over sidewalls of the contact holes and nitride structures over the oxide structures. Conductive structures are formed over inner sidewalls of the composite structures. Additional nitride-capped electrodes are formed over the conductive structures and extend perpendicular to the nitride-capped electrodes. Pairs of nitride spacers are formed over opposing sidewalls of the additional nitride-capped electrodes and are separated from neighboring pairs of nitride spacers by apertures extending to upper surfaces of a portion of the neighboring semiconductive pillars. Portions of the oxide structures are removed to expose sidewalls of the portion of the neighboring semiconductive pillars. Semiconductor device structures and additional methods are also described.

    Abstract translation: 形成用于半导体器件结构的触点的方法包括形成延伸到相邻的半导体柱中的接触孔，并形成氮化物覆盖的电极的氮化物材料。 复合结构形成在接触孔内并且包括在接触孔的侧壁上的氧化物结构和氧化物结构上的氮化物结构。 导电结构形成在复合结构的内侧壁上。 附加的氮化物封盖的电极形成在导电结构之上并垂直于氮化物封盖的电极延伸。 一对氮化物间隔物形成在另外的氮化物覆盖的电极的相对侧壁上，并且通过延伸到相邻半导体柱的一部分的上表面的孔与相邻的氮化物间隔物相分离。 去除部分氧化物结构以暴露相邻半导体柱的部分的侧壁。 还描述了半导体器件结构和附加方法。

    Semiconductor devices including vertical memory cells and methods of forming same
    16.
    发明授权
    Semiconductor devices including vertical memory cells and methods of forming same 有权
    包括垂直存储单元的半导体器件及其形成方法

    公开(公告)号：US09373715B2

    公开(公告)日：2016-06-21

    申请号：US14075480

    申请日：2013-11-08

    Applicant: Micron Technology, Inc.

    Inventor： Wolfgang Mueller ,  Sanh D. Tang ,  Sourabh Dhir ,  Srinivas Pulugurtha

    IPC: H01L29/78 ,  G11C11/40 ,  H01L27/02 ,  H01L27/105 ,  H01L29/66 ,  H01L27/108

    CPC classification number: H01L29/7827 ,  G11C11/40 ,  H01L27/0207 ,  H01L27/1052 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10891 ,  H01L29/66666

    Abstract: A semiconductor device may include a memory array including vertical memory cells connected to a digit line, word lines, and a body connection line. A row or column of the memory array may include one or more pillars connected to the body connection line. A voltage may be applied to the body connection line through at least one pillar connected to the body connection line. Application of the voltage to the body connection line may reduce floating body effects. Methods of forming a connection between at least one pillar and a voltage supply are disclosed. Semiconductor devices including such connections are also disclosed.

    Abstract translation: 半导体器件可以包括存储器阵列，其包括连接到数字线，字线和主体连接线的垂直存储器单元。 存储器阵列的行或列可以包括连接到主体连接线的一个或多个支柱。 可以通过连接到主体连接线的至少一个支柱将电压施加到主体连接线。 施加电压到身体连接线可能会减少浮体效应。 公开了形成至少一个柱和电压源之间的连接的方法。 还公开了包括这种连接的半导体器件。

    INTER-MEMORY MOVEMENT IN A MULTI-MEMORY SYSTEM
    17.
    发明公开
    INTER-MEMORY MOVEMENT IN A MULTI-MEMORY SYSTEM 审中-公开

    公开(公告)号：US20240201885A1

    公开(公告)日：2024-06-20

    申请号：US18390844

    申请日：2023-12-20

    Applicant: Micron Technology, Inc.

    Inventor： Sourabh Dhir ,  Kang-Yong Kim

    IPC: G06F3/06

    CPC classification number: G06F3/0647 ,  G06F3/0616 ,  G06F3/0635 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0683

    Abstract: Methods, systems, and devices for improved inter-memory movement in a multi-memory system are described. A memory device may receive from a host device a command to move data from a first memory controlled by a first controller to a second memory controller by a second controller. The memory device may use the first and second controllers to facilitate the movement of the data from the first memory to the second memory via a path external to the host device. The memory device may indicate to the host device when to suspend activity to the first memory or the second memory and when to resume activity to the first memory or second memory.

    Inter-memory movement in a multi-memory system
    18.
    发明授权
    Inter-memory movement in a multi-memory system 有权

    公开(公告)号：US11868638B2

    公开(公告)日：2024-01-09

    申请号：US17018570

    申请日：2020-09-11

    Applicant: Micron Technology, Inc.

    Inventor： Sourabh Dhir ,  Kang-Yong Kim

    IPC: G06F12/00 ,  G06F3/06

    CPC classification number: G06F3/0647 ,  G06F3/0616 ,  G06F3/0635 ,  G06F3/0653 ,  G06F3/0659 ,  G06F3/0683

    Abstract: Methods, systems, and devices for improved inter-memory movement in a multi-memory system are described. A memory device may receive from a host device a command to move data from a first memory controlled by a first controller to a second memory controller by a second controller. The memory device may use the first and second controllers to facilitate the movement of the data from the first memory to the second memory via a path external to the host device. The memory device may indicate to the host device when to suspend activity to the first memory or the second memory and when to resume activity to the first memory or second memory.

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