Abstract:
Phase change memory materials in a dielectric-doped, antimony-rich GST family of materials which are antimony rich relative to GST-225, are described that have speed, retention and endurance characteristics suitable for storage class data storage A memory device includes an array of memory cells, where each memory cell includes a first electrode and a second electrode coupled to a memory element. The memory element comprises a body of phase change memory material that comprises a combination of Ge, Sb, and Te with a dielectric additive in amounts effective to provide a crystallization transition temperature greater than to 160° C., greater that 170° C. in some effective examples and greater than 190° C. in other effective examples. A controller is coupled to the array, and configured to execute set operations and reset operations for memory cells in the array.
Abstract:
A layer of phase change material with silicon or another semiconductor, or a silicon-based or other semiconductor-based additive, is formed using a composite sputter target including the silicon or other semiconductor, and the phase change material. The concentration of silicon or other semiconductor is more than five times greater than the specified concentration of silicon or other semiconductor in the layer being formed. For silicon-based additive in GST-type phase change materials, sputter target may comprise more than 40 at % silicon. Silicon-based or other semiconductor-based additives can be formed using the composite sputter target with a flow of reactive gases, such as oxygen or nitrogen, in the sputter chamber during the deposition.
Abstract:
A phase-change material having specific SiOx doping into special Ge-rich GexSbyTez material is described. Integrated circuits using this phase-change material as memory elements in a memory array can pass the solder bonding criteria mentioned above, while exhibiting good set speeds and demonstrating good 10 year data retention characteristics. A memory cell described herein comprises a first electrode and a second electrode; and a memory element in electrical series between the first and second electrode. The memory element comprises a GexSbyTez phase change material with a silicon oxide additive, including a combination of elements having Ge in a range of 28 to 36 at %, Sb in a range of 10 to 20 at %, Te in a range of 25 to 40 at %, Si in a range of 5 to 10 at %, and O in a range of 12 to 23 at %.
Abstract:
A voltage sensitive switching device has a first electrode, a second electrode, and a switching layer between the first and second electrodes, comprising a tellurium free, low germanium composition of arsenic As, selenium Se and germanium Ge. The switching device is used in 3D cross-point memory.
Abstract:
A memory access device that includes a first terminal with a first terminal workfunction and a chalcogenide-based selector layer with a first surface and a second surface opposite the first surface. A first control metal layer is positioned in physical and electrical contact with the first terminal and the first surface of the chalcogenide-based selector layer. The first control metal layer includes a first control workfunction different than the first terminal workfunction. A second terminal with a second terminal workfunction is positioned proximate the second surface of the chalcogenide-based selector layer.
Abstract:
A phase change storage device, Integrated Circuit (IC) chip including the devices and method of manufacturing IC chips with the devices. The device includes a phase change storage region with multiple phase change regions, e.g., two (2), of different phase change material serially-connected between said program/read line and a select device conduction terminal.
Abstract:
A phase change storage device, Integrated Circuit (IC) chip including the devices and method of manufacturing IC chips with the devices. The device includes a phase change storage region with multiple phase change regions, e.g., two (2), of different phase change material serially-connected between said program/read line and a select device conduction terminal.
Abstract:
A family of phase change materials GewSbxTeyNz having a crystallization temperature greater than 410° C., wherein a Ge atomic concentration is within a range from 43% to 54%, a Sb atomic concentration is within a range from 6% to 13%, a Te atomic concentration is within a range from 14% to 23%, and a N atomic concentration is within a range of 15% to 27%, is described. A method for programming a memory device including such phase change materials is also described.