SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY

    公开(公告)号:US20200152620A1

    公开(公告)日:2020-05-14

    申请号:US16743451

    申请日:2020-01-15

    Abstract: A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

    SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY

    公开(公告)号:US20190148359A1

    公开(公告)日:2019-05-16

    申请号:US16201811

    申请日:2018-11-27

    Abstract: A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

    Multi-die memory device with peak current reduction

    公开(公告)号:US11908812B2

    公开(公告)日:2024-02-20

    申请号:US17176787

    申请日:2021-02-16

    Abstract: A memory device including a substrate including a substrate contact pad. The memory device includes a first memory die including a first power supply contact pad electrically coupled to the substrate contact pad and a first power supply circuit on the first memory die. The first memory die further includes a first electrostatic discharge (ESD) power clamp contact pad electrically coupled to the substrate contact pad and a first ESD power clamp circuit on the first memory die. The memory device further includes a second memory die including a second power supply contact pad electrically coupled to the substrate contact pad and a second power supply circuit on the second memory die and a second ESD power clamp contact pad electrically coupled to a second ESD power clamp circuit on the second memory die, wherein the second ESD power clamp contact pad is electrically disconnected from the substrate contact.

    SEMICONDUCTOR DEVICES HAVING 3-DIMENSIONAL INDUCTIVE STRUCTURES

    公开(公告)号:US20200144182A1

    公开(公告)日:2020-05-07

    申请号:US16183057

    申请日:2018-11-07

    Abstract: Semiconductor devices having inductive structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a substrate and at least one circuit component coupled to the substrate. The semiconductor device can further include an inductive structure carried by the substrate and having a stack of alternating first and second layers. In some embodiments, the first layers comprise an oxide material and the second layers each include a coil of conductive material. The coils of conductive material can be electrically coupled (a) together to form an inductor and (b) to the at least one circuit component.

    Semiconductor devices with package-level configurability

    公开(公告)号:US10312232B1

    公开(公告)日:2019-06-04

    申请号:US16007903

    申请日:2018-06-13

    Abstract: A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

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