公开(公告)号：US06603453B2

公开(公告)日：2003-08-05

申请号：US10229089

申请日：2002-08-28

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Setsuo Nakajima ,  Naoya Sakamoto

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Setsuo Nakajima ,  Naoya Sakamoto

IPC分类号： G09G336

CPC分类号： H01L27/124 ,  G02F1/13454 ,  G09G3/3208 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2300/043 ,  G09G2300/08 ,  G09G2310/0248 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2320/029 ,  G09G2320/043 ,  H01L27/1214 ,  H01L29/78648 ,  H04N9/3102 ,  H04N9/3105 ,  H04N9/312 ,  H04N9/3173

摘要： There is provided a semiconductor device having TFTs whose thresholds can be controlled. There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.

公开(公告)号：US5643804A

公开(公告)日：1997-07-01

申请号：US242813

申请日：1994-05-16

申请人： Michio Arai ,  Yukio Yamauchi ,  Naoya Sakamoto ,  Katsuto Nagano

发明人： Michio Arai ,  Yukio Yamauchi ,  Naoya Sakamoto ,  Katsuto Nagano

IPC分类号： H01L27/10 ,  H01L21/336 ,  H01L25/16 ,  H01L21/265 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L29/66757 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/01025 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/19105 ,  Y10S438/938

摘要： A hybrid (composite) integrated circuit element comprises a substrate, a thin film type integrated circuit formed on a substrate through a thin film process, and a lamination type passive circuit element such as a capacitor, inductor, resitance and a combination thereof formed on the integrated circuit. During the firing of passive circuit element in a hydrogen atmosphere, the semiconductor layer which constitutes the integrated circuit is also heat annealed. Various substrates can be used as the substrate, for example, quartz, ceramic and a cheap semiconductor substrate which has not been treated with a mirror-grinding by the use of a glass layer.

摘要翻译： 混合（复合）集成电路元件包括基板，通过薄膜工艺在基板上形成的薄膜型集成电路，以及形成在其上的诸如电容器，电感器，电阻及其组合的层叠型无源电路元件 集成电路。 在氢气氛中对无源电路元件进行烧制时，构成集成电路的半导体层也被热退火。 可以使用各种基板作为基板，例如石英，陶瓷和廉价的半导体基板，其尚未通过使用玻璃层进行镜面研磨处理。

公开(公告)号：US5574293A

公开(公告)日：1996-11-12

申请号：US343492

申请日：1994-11-22

申请人： Michio Arai ,  Takashi Inushima ,  Mitsufumi Codama ,  Kazushi Sugiura ,  Ichiro Takayama ,  Isamu Kobori ,  Yukio Yamauchi ,  Naoya Sakamoto

发明人： Michio Arai ,  Takashi Inushima ,  Mitsufumi Codama ,  Kazushi Sugiura ,  Ichiro Takayama ,  Isamu Kobori ,  Yukio Yamauchi ,  Naoya Sakamoto

IPC分类号： H01L21/84 ,  H01L27/12 ,  H01L27/146 ,  H01L31/113 ,  H01L31/062

CPC分类号： H01L27/14643 ,  H01L21/84 ,  H01L27/1237 ,  H01L31/1133

摘要： A substrate (1) has a surface covered with an insulation layer (2), on which an active layer (3') made of non-single crystal silicon through thin film technique is provided. A gate electrode layer (5') is partially provided on said active layer through a gate insulation layer (4'). Said active layer (3') is subject to injection of P-type or N-type impurities to provide an image sensor of MOS structure. Bias potential is applied to a gate electrode so that a circuit between a source and a drain is in an On state, so that input light through said substrate or said gate electrode is applied to said active layer, and electrical output depending upon said input light is obtained from said source electrode or said drain electrode. Other MOS transistors for switching element and/or shift registers for operating said image sensor are provided on said substrate (1). Said active layer (3') is obtained by crystallizing said amorphous silicon layer through a laser anneal process or a high temperature anneal process, and hydrogenation process, and the trap density of said active layer is less than 5.times.10.sup.11 /cm.sup.2. Optical response time is short, less than 500 .mu.sec, so, high speed operation ten times as high as that of a prior image sensor is possible.

摘要翻译： PCT No.PCT / JP94 / 00452 Sec。 371日期：1994年11月22日 102（e）日期1994年11月22日PCT 1994年3月22日PCT公布。 WO94 / 22173 PCT出版物 日期：1994年9月29日一种衬底（1）具有被绝缘层（2）覆盖的表面，其上提供由非单晶硅通过薄膜技术制成的有源层（3'）。 栅极电极层（5'）通过栅极绝缘层（4'）部分地设置在所述有源层上。 所述有源层（3'）经受注入P型或N型杂质以提供MOS结构的图像传感器。 将偏置电位施加到栅电极，使得源极和漏极之间的电路处于导通状态，使得通过所述衬底或所述栅电极的输入光被施加到所述有源层，并且根据所述输入光输出电输出 从所述源电极或所述漏电极获得。 用于操作所述图像传感器的用于开关元件和/或移位寄存器的其它MOS晶体管设置在所述基板（1）上。 所述有源层（3'）是通过激光退火工艺或高温退火工艺和氢化工艺使所述非晶硅层结晶而获得的，并且所述有源层的陷阱密度小于5×10 11 / cm 2。 光学响应时间短，小于500μs，因此可以实现高于现有图像传感器的10倍的高速度运行。

公开(公告)号：US5442198A

公开(公告)日：1995-08-15

申请号：US189498

申请日：1994-01-31

申请人： Michio Arai ,  Masaaki Ikeda ,  Kazushi Sugiura ,  Nobuo Furukawa ,  Mitsufumi Kodama ,  Yukio Yamauchi ,  Naoya Sakamoto ,  Takeshi Fukada ,  Masaaki Hiroki ,  Ichirou Takayama

发明人： Michio Arai ,  Masaaki Ikeda ,  Kazushi Sugiura ,  Nobuo Furukawa ,  Mitsufumi Kodama ,  Yukio Yamauchi ,  Naoya Sakamoto ,  Takeshi Fukada ,  Masaaki Hiroki ,  Ichirou Takayama

IPC分类号： H01L21/20 ,  H01L21/336 ,  H01L29/786 ,  H01L31/105 ,  H04N1/031 ,  H01L21/00 ,  H01L29/161 ,  H01L29/34

CPC分类号： H01L29/66757 ,  H01L21/2022 ,  H01L29/78675 ,  H01L31/1055 ,  H04N1/0313 ,  H04N1/0316 ,  Y10S257/905

摘要： A MOS-FET transistor is produced on a substrate made of glass which has a non single crystal semiconductor film (2'). The average diameter of a crystal grain in said film is in the range between 0.5 times and 4 times of thickness of said film, and said average diameter is 250 .ANG.-8000 .ANG., and said film thickness is 500 .ANG.-2000 .ANG.. The density of oxygen in the semiconductor film (2') is less than 2.times.10.sup.19 /cm.sup.3. A photo sensor having PIN structure is also produced on the substrate, to provide an image sensor for a facsimile transmitter together with the transistors. Said film (2') is produced by placing amorphous silicon film on the glass substrate through CVD process using disilane gas, and effecting solid phase growth to said amorphous silicon film by heating the substrate together with said film in nitrogen gas atmosphere. The film (2') thus produced is subject to implantation of dopant for providing a transistor. The film thus produced has high mobility which provides high speed operation of a transistor, and low threshold voltage of a transistor.

摘要翻译： 在具有非单晶半导体膜（2'）的由玻璃制成的基板上制造MOS-FET晶体管。 所述膜中的晶粒的平均直径在所述膜的厚度的0.5倍至4倍的范围内，所述平均直径为250安培-8000安培，所述膜厚度为500安培-2000安。 半导体膜（2'）中的氧的密度小于2×10 19 / cm 3。 具有PIN结构的光电传感器也在基板上产生，以便与晶体管一起为传真发送器提供图像传感器。 通过使用乙硅烷气体的CVD法将玻璃基板上的非晶硅膜放置在所述膜（2'）上，通过在氮气气氛中与所述膜一起加热基板，对所述非晶硅膜进行固相生长。 由此产生的薄膜（2'）可以注入用于提供晶体管的掺杂剂。 由此产生的膜具有提供晶体管的高速操作和晶体管的低阈值电压的高迁移率。

公开(公告)号：US5017502A

公开(公告)日：1991-05-21

申请号：US468069

申请日：1990-01-22

申请人： Mitsunori Sakama ,  Takeshi Fukada ,  Naoya Sakamoto ,  Nobumitsu Amachi ,  Shigenori Hayashi ,  Takashi Inushima

发明人： Mitsunori Sakama ,  Takeshi Fukada ,  Naoya Sakamoto ,  Nobumitsu Amachi ,  Shigenori Hayashi ,  Takashi Inushima

IPC分类号： G06K7/10 ,  H01L27/146 ,  H01L31/105 ,  H04N5/228 ,  H04N5/369

CPC分类号： G06K7/10841 ,  H01L27/14643 ,  H01L31/1055 ,  H04N3/1581 ,  Y10S148/092

摘要： Disclosed is a method for producing image sensors having a plurality of sensing elements including the formation of parallel separating grooves by laser irradiation, the filling of the grooves with an insulating film, and the subsequent provision of a groove in the insulating film in a direction diagonal to the parallel grooves for metallization.

公开(公告)号：US4891465A

公开(公告)日：1990-01-02

申请号：US221246

申请日：1988-07-06

申请人： Katsuo Taniguchi ,  Michio Tanaka ,  Kazunori Takahata ,  Naoya Sakamoto ,  Toshihiro Takai ,  Yoshito Kurano ,  Masayasu Ishibashi

发明人： Katsuo Taniguchi ,  Michio Tanaka ,  Kazunori Takahata ,  Naoya Sakamoto ,  Toshihiro Takai ,  Yoshito Kurano ,  Masayasu Ishibashi

IPC分类号： B01J29/18 ,  B01J29/00 ,  C07B61/00 ,  C07C1/00 ,  C07C2/66 ,  C07C2/86 ,  C07C15/00 ,  C07C15/02 ,  C07C15/14 ,  C07C15/16 ,  C07C15/24 ,  C07C37/08 ,  C07C39/15 ,  C07C43/263 ,  C07C67/00 ,  C07C67/08

CPC分类号： C07C39/15 ,  C07C2/66 ,  C07C2/861 ,  C07C2/864 ,  C07C2529/18

摘要： In a process for producing an alkyl group-substituted aromatic hydrocarbon according to the present invention, (i) an aromatic hydrocarbon is reacted with (ii) an alkylating agent selected from the group consisting of olefins, lower aliphatic alcohols and alkyl halides in the presence of a mordenite-type zeolite catalyst treated with a fluorine-containing compound, and therefore the conversion of the aromatic compound can be increased and further it is possible to introduce the specific number of alkyl groups into the specific position of the aromatic compound.In particular, when biphenyl is used as the aromatic hydrocarbon and propylene is used as the alkylating agent, p,p'-diisopropylbiphenyl can be obtained in a high yield and high selectivity.

公开(公告)号：US09331207B2

公开(公告)日：2016-05-03

申请号：US13937591

申请日：2013-07-09

申请人： Shunpei Yamazaki ,  Naoya Sakamoto ,  Takahiro Sato ,  Shunsuke Koshioka ,  Takayuki Cho ,  Yoshitaka Yamamoto ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki

发明人： Shunpei Yamazaki ,  Naoya Sakamoto ,  Takahiro Sato ,  Shunsuke Koshioka ,  Takayuki Cho ,  Yoshitaka Yamamoto ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L29/201

CPC分类号： H01L29/7869 ,  H01L29/201

摘要： A semiconductor device includes a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film in contact with the gate insulating film and including a channel formation region which overlaps with the gate electrode; a source electrode and a drain electrode over the oxide semiconductor film; and an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode. The source electrode and the drain electrode each include a first metal film having an end portion at the end of the channel formation region, a second metal film over the first metal film and containing copper, and a third metal film over the second metal film. The second metal film is formed on the inner side than the end portion of the first metal film.

摘要翻译： 半导体器件包括栅电极; 栅电极上的栅极绝缘膜; 与所述栅极绝缘膜接触并且包括与所述栅电极重叠的沟道形成区域的氧化物半导体膜; 氧化物半导体膜上的源电极和漏电极; 以及氧化物半导体膜，源电极和漏电极上的氧化物绝缘膜。 源极电极和漏极电极各自包括在沟道形成区域的端部具有端部的第一金属膜，在第一金属膜上的含有铜的第二金属膜和在第二金属膜上的第三金属膜。 第二金属膜形成在比第一金属膜的端部的内侧。

公开(公告)号：US08809203B2

公开(公告)日：2014-08-19

申请号：US12130307

申请日：2008-05-30

申请人： Mitsuhiro Ichijo ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Seiji Yasumoto ,  Kenichi Okazaki ,  Shunpei Yamazaki ,  Naoya Sakamoto

发明人： Mitsuhiro Ichijo ,  Tetsuhiro Tanaka ,  Takashi Ohtsuki ,  Seiji Yasumoto ,  Kenichi Okazaki ,  Shunpei Yamazaki ,  Naoya Sakamoto

IPC分类号： H01L21/469

CPC分类号： H01L21/31608 ,  C23C16/4404 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/1214 ,  H01L27/1259 ,  H01L29/4908

摘要： It is an object to provide a method for manufacturing a semiconductor device that has a semiconductor element including a film in which mixing impurities is suppressed. It is another object to provide a method for manufacturing a semiconductor device with high yield. In a method for manufacturing a semiconductor device in which an insulating film is formed in contact with a semiconductor layer provided over a substrate having an insulating surface with use of a plasma CVD apparatus, after an inner wall of a reaction chamber of the plasma CVD apparatus is coated with a film that does not include an impurity to the insulating film, a substrate is introduced in the reaction chamber, and the insulating film is deposited over the substrate. As a result, an insulating film in which the amount of impurities is reduced can be formed.

摘要翻译： 本发明的目的是提供一种制造半导体器件的方法，该半导体器件具有包含其中抑制混合杂质的膜的半导体元件。 另一个目的是提供一种以高产率制造半导体器件的方法。 在制造半导体器件的方法中，其中绝缘膜与使用等离子体CVD装置的具有绝缘表面的衬底上提供的半导体层形成接触，在等离子体CVD装置的反应室的内壁 涂覆有不含杂质的薄膜，在反应室中引入基板，并将绝缘膜沉积在基板上。 结果，可以形成其中杂质减少量的绝缘膜。

公开(公告)号：US20120205700A1

公开(公告)日：2012-08-16

申请号：US13367833

申请日：2012-02-07

申请人： Yoshifumi Tanada ,  Naoya Sakamoto ,  Hiroki Adachi ,  Shingo Eguchi ,  Koji Ono ,  Kensuke Yoshizumi ,  Hiroto Shinoda

发明人： Yoshifumi Tanada ,  Naoya Sakamoto ,  Hiroki Adachi ,  Shingo Eguchi ,  Koji Ono ,  Kensuke Yoshizumi ,  Hiroto Shinoda

IPC分类号： H01L51/52 ,  H01L51/56

CPC分类号： H01L51/5212 ,  H01L27/3279 ,  H01L51/5228 ,  H01L2251/5361

摘要： The present invention focuses on a structure in which an auxiliary wiring for increasing the conductivity of an upper electrode is provided on the substrate side. The conductive auxiliary wiring of a light-emitting device is provided over a substrate, and an upper portion of the auxiliary wiring protrudes in a direction parallel to the substrate. Further, an EL layer formed in a region including a lower electrode layer and the auxiliary wiring is physically divided by the auxiliary wiring. An upper electrode layer formed in a manner similar to that of the lower electrode layer may be electrically connected to at least part of a side surface of the auxiliary wiring. Such an auxiliary wiring may be used in a lighting device and a display device.

摘要翻译： 本发明的重点是在基板侧设置用于提高上部电极的导电性的辅助布线的结构。 发光装置的导电性辅助布线设置在基板上，辅助配线的上部沿与基板平行的方向突出。 此外，在包括下电极层和辅助布线的区域中形成的EL层在物理上被辅助布线分开。 以类似于下电极层的方式形成的上电极层可以电连接到辅助布线的侧表面的至少一部分。 这种辅助布线可以用在照明装置和显示装置中。

公开(公告)号：US20090305503A1

公开(公告)日：2009-12-10

申请号：US12408375

申请日：2009-03-20

申请人： Naoya Sakamoto ,  Takahiro Sato ,  Yoshiaki Oikawa ,  Rai Sato ,  Yamato Aihara ,  Takayuki Cho ,  Masami Jintyou

发明人： Naoya Sakamoto ,  Takahiro Sato ,  Yoshiaki Oikawa ,  Rai Sato ,  Yamato Aihara ,  Takayuki Cho ,  Masami Jintyou

IPC分类号： H01L21/306

CPC分类号： G06K19/07749 ,  G06K19/07779 ,  G06K19/07783 ,  H01L21/32134 ,  H01L21/32136 ,  H01L21/76829 ,  H01L21/76838 ,  H01L23/53223 ,  H01L27/124 ,  H01L27/1266 ,  H01L27/13 ,  H01L2924/0002 ,  H01L2924/00

摘要： A conductive film containing aluminum or an aluminum alloy with a thickness equal to or greater than 1 μm and equal to or less than 10 μm is etched by wet-etching to be a predetermined thickness, and then etched by dry-etching, whereby side-etching of the conductive film can be suppressed and thickness reduction of a mask can be suppressed. The suppression of side-etching of the conductive film and the suppression of thickness reduction of the mask enable a conductive film containing aluminum or an aluminum alloy even with a large thickness equal to or greater than 1 μm and equal to or less than 10 μm to be etched such that the gradient of the edge portion of the conductive film can be steep, a predetermined thickness of the conductive film can be obtained, and shape difference from a mask pattern can be suppressed.

摘要翻译： 通过湿式蚀刻将厚度等于或大于1μm且等于或小于10μm的铝或铝合金的导电膜蚀刻成预定厚度，然后通过干法蚀刻进行蚀刻， 可以抑制导电膜的蚀刻，并且可以抑制掩模的厚度减小。 导电膜的侧蚀刻的抑制和掩模的厚度减小的抑制使得能够使含有铝或铝合金的导电膜即使具有等于或大于1μm以上并且等于或小于10μm的厚度 被蚀刻使得导电膜的边缘部分的梯度可以陡峭，可以获得预定厚度的导电膜，并且可以抑制与掩模图案的形状差异。