公开(公告)号：US08268643B2

公开(公告)日：2012-09-18

申请号：US13062590

申请日：2009-09-04

申请人： Naoki Matsumoto

发明人： Naoki Matsumoto

IPC分类号： H01L21/66

CPC分类号： C30B29/406 ,  C30B25/20 ,  H01L21/02395 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02642 ,  H01L21/02647 ,  H01L21/02658

摘要： The present invention provides a substrate formed at a low cost and having a controlled plate shape, an epitaxial layer provided substrate obtained by forming an epitaxial layer on the substrate, and methods for producing them. The method for producing the substrate according to the present invention includes an ingot growing step serving as a step of preparing an ingot formed of gallium nitride (GaN); and a slicing step serving as a step of obtaining a substrate formed of gallium nitride, by slicing the ingot. In the slicing step, the substrate thus obtained by the slicing has a main surface with an arithmetic mean roughness Ra of not less than 0.05 μm and not more than 1 μm on a line of 10 mm.

摘要翻译： 本发明提供一种以低成本形成并具有受控板形状的基板，通过在基板上形成外延层而获得的外延层提供的基板及其制造方法。 根据本发明的基板的制造方法包括：铸锭生长步骤，用于制备由氮化镓（GaN）形成的铸锭的步骤; 以及作为通过切割锭来获得由氮化镓形成的衬底的步骤的切片步骤。 在切片工序中，通过切片得到的基板在10mm的线上具有算术平均粗糙度Ra为0.05μm以上且1μm以下的主面。

公开(公告)号：US08141514B2

公开(公告)日：2012-03-27

申请号：US11686551

申请日：2007-03-15

申请人： Masanobu Honda ,  Naoki Matsumoto ,  Satoshi Tanaka ,  Yutaka Matsui

发明人： Masanobu Honda ,  Naoki Matsumoto ,  Satoshi Tanaka ,  Yutaka Matsui

IPC分类号： C23C16/00 ,  C23C16/50 ,  C23F1/00 ,  H01L21/306

CPC分类号： H01J37/32532 ,  H01J37/32082 ,  H01J37/32623 ,  H01L21/3065

摘要： A plasma processing apparatus having a substrate processing chamber, which enables leakage of plasma into an exhaust space to be prevented. The substrate processing chamber has therein a processing space in which plasma processing is carried out on a substrate, an exhaust space for exhausting gas out of the processing space, and an exhaust flow path that communicates the exhaust space and the processing space together. The plasma processing apparatus further has a grounding component that is electrically grounded and is disposed in the exhaust flow path. The grounding component has a conducting portion made of a conductive material, and the conducting portion has an exposed area exposed to the exhaust flow path in a range of 100 to 1000 cm2.

摘要翻译： 一种具有基板处理室的等离子体处理装置，能够防止等离子体泄漏到排气空间。 基板处理室具有处理空间，其中在基板上执行等离子体处理，将用于从处理空间排出气体的排气空间和将排气空间与处理空间连通在一起的排气流路。 等离子体处理装置还具有电接地并设置在排气流路中的接地部件。 接地部件具有由导电材料制成的导电部分，导电部分具有暴露于排气流路的暴露区域，范围为100至1000cm 2。

公开(公告)号：US08034213B2

公开(公告)日：2011-10-11

申请号：US11694083

申请日：2007-03-30

申请人： Naoki Matsumoto ,  Yoshinobu Hayakawa ,  Hidetoshi Hanaoka ,  Noriaki Kodama ,  Chishio Koshimizu ,  Manabu Iwata ,  Satoshi Tanaka

发明人： Naoki Matsumoto ,  Yoshinobu Hayakawa ,  Hidetoshi Hanaoka ,  Noriaki Kodama ,  Chishio Koshimizu ,  Manabu Iwata ,  Satoshi Tanaka

IPC分类号： H01L21/00 ,  C23C16/00

CPC分类号： H01J37/32174 ,  H01J37/32091

摘要： A plasma processing apparatus includes a processing vessel capable of being vacuum evacuated; a first electrode disposed in the processing vessel in a state electrically floating via an insulating member or a space; a second electrode, arranged in the processing vessel to face and be in parallel to the first electrode with a specific interval, supporting a substrate to be processed; a processing gas supply unit for supplying a desired processing gas into a processing space surrounded by the first electrode, the second electrode and a sidewall of the processing vessel; and a first radio frequency power supply unit for applying a first radio frequency power to the second electrode to generate a plasma of the processing gas in the processing space. An electrostatic capacitance between the first electrode and the processing vessel is set such that a desired plasma density distribution is obtained for the generated plasma.

摘要翻译： 一种等离子体处理装置，其特征在于，包括：真空抽真空处理容器; 以处于通过绝缘构件或空间电浮动的状态设置在处理容器中的第一电极; 第二电极，布置在处理容器中以特定间隔面对并平行于第一电极，支撑待处理的基板; 处理气体供给单元，用于将期望的处理气体供给到被处理容器的第一电极，第二电极和侧壁包围的处理空间中; 以及第一射频电源单元，用于向所述第二电极施加第一射频功率以在所述处理空间中产生所述处理气体的等离子体。 第一电极和处理容器之间的静电电容被设定为使得所产生的等离子体获得期望的等离子体密度分布。

公开(公告)号：US20110214815A1

公开(公告)日：2011-09-08

申请号：US13113330

申请日：2011-05-23

申请人： Akira Koshiishi ,  Masaru Sugimoto ,  Kunihiko Hinata ,  Noriyuki Kobayashi ,  Chishio Koshimizu ,  Ryuji Ohtani ,  Kazuo Kibi ,  Masashi Saito ,  Naoki Matsumoto ,  Manabu Iwata ,  Daisuke Yano ,  Yohei Yamazawa ,  Hidetoshi Hanaoka ,  Toshihiro Hayami ,  Hiroki Yamazaki ,  Manabu Sato

发明人： Akira Koshiishi ,  Masaru Sugimoto ,  Kunihiko Hinata ,  Noriyuki Kobayashi ,  Chishio Koshimizu ,  Ryuji Ohtani ,  Kazuo Kibi ,  Masashi Saito ,  Naoki Matsumoto ,  Manabu Iwata ,  Daisuke Yano ,  Yohei Yamazawa ,  Hidetoshi Hanaoka ,  Toshihiro Hayami ,  Hiroki Yamazaki ,  Manabu Sato

IPC分类号： H01L21/3065

CPC分类号： H01J37/32091 ,  H01J37/32082 ,  H01J37/32174 ,  H01J37/3244 ,  H01J37/32697 ,  H01J37/32706 ,  H01J2237/334 ,  H01L21/3065

摘要： An apparatus includes an upper electrode and a lower electrode for supporting a wafer disposed opposite each other within a process chamber. A first RF power supply configured to apply a first RF power having a relatively higher frequency, and a second RF power supply configured to apply a second RF power having a relatively lower frequency is connected to the lower electrode. A variable DC power supply is connected to the upper electrode. A process gas is supplied into the process chamber to generate plasma of the process gas so as to perform plasma etching.

摘要翻译： 一种装置包括用于支撑在处理室内相对设置的晶片的上电极和下电极。 被配置为施加具有相对较高频率的第一RF功率的第一RF电源和被配置为施加具有相对较低频率的第二RF功率的第二RF电源连接到下电极。 可变直流电源连接到上电极。 将工艺气体供应到处理室中以产生处理气体的等离子体，以进行等离子体蚀刻。

公开(公告)号：US08012882B2

公开(公告)日：2011-09-06

申请号：US12238449

申请日：2008-09-26

申请人： Naoki Matsumoto

发明人： Naoki Matsumoto

IPC分类号： H01L21/302

CPC分类号： C30B29/406 ,  C30B33/00

摘要： In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±40 μm to ±100 μm. Since with that bow device fabrication by photolithography is challenging, reducing the bow to +30 μm to −20 μm is the goal. The surface deflected concavely is ground to impart to it a damaged layer that has a stretching effect, making the surface become convex. The damaged layer on the surface having become convex is removed by etching, which curtails the bow. Alternatively, the convex surface on the side opposite the surface having become convex is ground to generate a damaged layer. With the concave surface having become convex due to the damaged layer, suitably etching off the damaged layer curtails the bow.

摘要翻译： 在通过使用气相沉积在基底杂质衬底上形成GaN层然后除去基底衬底而制造的独立GaN膜中，由于热膨胀系数和晶格常数的层间的差异，弓将为大的±40μm至 ±100μm。 由于通过光刻的弓形器件制造是具有挑战性的，所以将弓降低到+30μm至-20μm是目标。 将凹面偏转的表面研磨成具有拉伸效果的损伤层，使表面变凸。 通过蚀刻来去除已经变得凸起的表面上的损伤层，这会削弱弓形。 或者，与已经变得凸起的表面相对的一侧的凸表面被研磨以产生受损层。 由于损伤层由于凹面变得凸起，因此适当地蚀刻出损伤层，从而使弓弯曲。

公开(公告)号：US08008165B2

公开(公告)日：2011-08-30

申请号：US12836001

申请日：2010-07-14

申请人： Masahiro Nakayama ,  Naoki Matsumoto ,  Koshi Tamamura ,  Masao Ikeda

发明人： Masahiro Nakayama ,  Naoki Matsumoto ,  Koshi Tamamura ,  Masao Ikeda

IPC分类号： H01L21/30

CPC分类号： H01L21/02008 ,  B24B37/08 ,  H01L21/02024 ,  Y10S438/959

摘要： Nitride semiconductor wafers which are produced by epitaxially grown nitride films on a foreign undersubstrate in vapor phase have strong inner stress due to misfit between the nitride and the undersubstrate material. A GaN wafer which has made by piling GaN films upon a GaAs undersubstrate in vapor phase and eliminating the GaAs undersubstrate bends upward due to the inner stress owing to the misfit of lattice constants between GaN and GaAs.

摘要翻译： 由氮化物和下衬底材料之间的失配导致的，由外延生长的氮化物膜在气相中的外来下衬衬底产生的氮化物半导体晶片具有很强的内部应力。 通过在气相中在GaAs下衬底上堆叠GaN膜而消除GaAs下衬层而制成的GaN晶片由于内部应力而由于GaN和GaAs之间的晶格常数的失配而向上弯曲。

公开(公告)号：US07988816B2

公开(公告)日：2011-08-02

申请号：US11157061

申请日：2005-06-21

申请人： Akira Koshiishi ,  Masaru Sugimoto ,  Kunihiko Hinata ,  Noriyuki Kobayashi ,  Chishio Koshimizu ,  Ryuji Ohtani ,  Kazuo Kibi ,  Masashi Saito ,  Naoki Matsumoto ,  Yoshinobu Ooya ,  Manabu Iwata ,  Daisuke Yano ,  Yohei Yamazawa ,  Hidetoshi Hanaoka ,  Toshihiro Hayami ,  Hiroki Yamazaki ,  Manabu Sato

发明人： Akira Koshiishi ,  Masaru Sugimoto ,  Kunihiko Hinata ,  Noriyuki Kobayashi ,  Chishio Koshimizu ,  Ryuji Ohtani ,  Kazuo Kibi ,  Masashi Saito ,  Naoki Matsumoto ,  Yoshinobu Ooya ,  Manabu Iwata ,  Daisuke Yano ,  Yohei Yamazawa ,  Hidetoshi Hanaoka ,  Toshihiro Hayami ,  Hiroki Yamazaki ,  Manabu Sato

IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306 ,  H05B31/26

CPC分类号： H01J37/32422 ,  H01J37/32018 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32522 ,  H01J37/32834 ,  H01J2237/2001 ,  H01J2237/334 ,  H01J2237/3344 ,  H01L21/67069 ,  Y10S156/915

摘要： A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.

摘要翻译： 等离子体蚀刻装置包括上电极和下电极，在其间产生处理气体的等离子体以在晶片W上进行等离子体蚀刻。该装置还包括设置在晶片周围的冷却环，设置在冷却周围的校正环 环和直接连接到校正环的可变直流电源，所述直流电压被预设为向校正环提供相对于地电位的负偏压，用于吸引等离子体中的离子并将校正环的温度增加到 补偿由于冷却环导致的目标基板的边缘附近的空间的温度的降低。

公开(公告)号：US20110114261A1

公开(公告)日：2011-05-19

申请号：US13003102

申请日：2009-06-16

申请人： Naoki Matsumoto ,  Kazuyuki Kato ,  Masafumi Shikata ,  Kazuto Takai

发明人： Naoki Matsumoto ,  Kazuyuki Kato ,  Masafumi Shikata ,  Kazuto Takai

IPC分类号： C23F1/08

CPC分类号： H01L21/6719 ,  H01J37/32192 ,  H01J37/32238 ,  H01J37/3244 ,  H01J37/32449 ,  H01L21/67126 ,  H01L21/68785

摘要： A plasma processing apparatus includes a processing container in which a plasma processing is performed on a substrate to be processed, a holding stage which is disposed in the processing container and holds thereon the substrate to be processed, a dielectric plate which is provided at a location facing the holding stage and transmits a microwave into the processing container, and a reactive gas supply unit which supplies a reactive gas for plasma processing toward the central region of the substrate to be processed held by the holding stage. Here, the reactive gas supply unit includes an injector base, which is disposed at a location more recessed inside the dielectric plate than a wall surface of the dielectric plate facing the holding stage. A supply hole, which supplies a reactive gas for plasma processing into the processing container, is formed in the injector base.

摘要翻译： 等离子体处理装置包括处理容器，其中对待处理的基板进行等离子体处理，保持台设置在处理容器中并保持在其上待处理的基板，电介质板，其设置在位置 面向保持阶段并将微波传输到处理容器中，以及反应气体供应单元，其向保持阶段保持的待处理基板的中心区域提供用于等离子体处理的反应气体。 这里，反应气体供给单元包括喷射器基座，该喷射器基座设置在比介质板的面向保持台的壁面更靠内侧的位置。 在喷射器基座中形成供应孔，其将用于等离子体处理的反应气体供应到处理容器中。

公开(公告)号：US07919343B2

公开(公告)日：2011-04-05

申请号：US12432105

申请日：2009-04-29

申请人： Keiji Ishibashi ,  Naoki Matsumoto ,  Masato Irikura

发明人： Keiji Ishibashi ,  Naoki Matsumoto ,  Masato Irikura

IPC分类号： H01L21/00

CPC分类号： H01L21/02013 ,  C30B29/403 ,  C30B33/00 ,  H01L21/02024 ,  H01L24/32 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12041 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method for surface treatment of a group III nitride crystal includes the steps of lapping a surface of a group III nitride crystal using a hard abrasive grain with a Mohs hardness higher than 7, and abrasive-grain-free polishing the lapped surface of the group III nitride crystal using a polishing solution without containing abrasive grain, and the polishing solution without containing abrasive grain has a pH of not less than 1 and not more than 6, or not less than 8.5 and not more than 14. Accordingly, the method for surface treatment of a group III nitride crystal can be provided according to which hard abrasive grains remaining at the lapped crystal can be removed to reduce impurities at the crystal surface.

摘要翻译： 用于III族氮化物晶体的表面处理的方法包括以下步骤：使用莫氏硬度高于7的硬磨粒研磨III族氮化物晶体的表面，并且对该组的研磨表面进行无磨粒抛光 使用不含磨粒的研磨液的III族氮化物结晶，不含磨粒的研磨液的pH为1以上且6以下，8.5以下且14以下。因此， 可以提供III族氮化物晶体的表面处理，根据该III族氮化物晶体的表面处理可以去除在研磨晶体上残留的硬磨粒以减少晶体表面的杂质。

公开(公告)号：US07872331B2

公开(公告)日：2011-01-18

申请号：US12812697

申请日：2009-02-16

申请人： Keiji Ishibashi ,  Hidenori Mikami ,  Naoki Matsumoto

发明人： Keiji Ishibashi ,  Hidenori Mikami ,  Naoki Matsumoto

IPC分类号： H01L29/06 ,  H01L29/12 ,  H01L31/0256 ,  H01L29/20 ,  H01L31/0304 ,  H01L23/58

CPC分类号： H01L21/02021 ,  C30B29/403 ,  C30B33/00 ,  H01L24/32 ,  H01L33/0075 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/12041 ,  H01L2924/12042 ,  Y10S438/928 ,  Y10S438/959 ,  Y10S438/977 ,  H01L2924/00014 ,  H01L2924/00

摘要： A nitride semiconductor wafer is planar-processed by grinding a bottom surface of the wafer, etching the bottom surface by, e.g., KOH for removing a bottom process-induced degradation layer, chamfering by a rubber whetstone bonded with 100 wt %-60 wt % #3000-#600 diamond granules and 0 wt %-40 wt % oxide granules, grinding and polishing a top surface of the wafer, etching the top surface for eliminating a top process-induced degradation layer and maintaining a 0.5 μm-10 μm thick edge process-induced degradation layer.

摘要翻译： 氮化物半导体晶片通过研磨晶片的底面进行平面加工，例如通过KOH去除底部工艺诱导的降解层，蚀刻底面，通过与100重量％-60重量％粘合的橡胶砂轮倒角， ＃3000-＃600金刚石颗粒和0重量％-40重量％的氧化物颗粒，研磨和抛光晶片的顶表面，蚀刻顶表面以消除顶部工艺诱导的降解层并保持0.5μm-10μm厚 边缘过程诱导的降解层。