公开(公告)号：US08476758B2

公开(公告)日：2013-07-02

申请号：US11971470

申请日：2008-01-09

申请人： Qinghuang Lin

发明人： Qinghuang Lin

IPC分类号： H01L23/52

CPC分类号： H01L23/532 ,  H01L21/76808 ,  H01L21/7682 ,  H01L21/76835 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： The present invention provides a method of fabricating an airgap-containing interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene airgap-containing low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating.

摘要翻译： 本发明提供一种制造含气隙的互连结构的方法，其中可图案化的低k材料代替了使用单独的光致抗蚀剂和电介质材料的需要。 具体而言，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌气隙低k互连结构的简化方法。

公开(公告)号：US08415248B2

公开(公告)日：2013-04-09

申请号：US13474349

申请日：2012-05-17

申请人： Shyng-Tsong Chen ,  Qinghuang Lin ,  Sampath Purushothaman ,  Terry A. Spooner ,  Shawn M. Walsh

发明人： Shyng-Tsong Chen ,  Qinghuang Lin ,  Sampath Purushothaman ,  Terry A. Spooner ,  Shawn M. Walsh

IPC分类号： H01L21/4763

CPC分类号： H01L23/5329 ,  H01L21/4846 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76831 ,  H01L23/49894 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： A self-aligned interconnect structure is provided that includes a first patterned and cured low-k material located on a surface of a substrate, wherein the first patterned and cured low-k material includes at least one first interconnect pattern (via or trench pattern) therein. A second patterned and cured low-k material having at least one second interconnect pattern that is different from the first interconnect pattern is located atop the first patterned and cured low k material. A portion of the second patterned and cured low-k material partially fills the at least one first interconnect within the first patterned and cured low-k material. A conductive material fills the at least one first interconnect pattern and the at least one second interconnect pattern. A method of forming such a self-aligned interconnect structure is also provided.

摘要翻译： 提供了自对准的互连结构，其包括位于衬底的表面上的第一图案化和固化的低k材料，其中第一图案化和固化的低k材料包括至少一个第一互连图案（通孔或沟槽图案） 其中。 具有不同于第一互连图案的至少一个第二互连图案的第二图案化和固化的低k材料位于第一图案化和固化的低k材料的顶部。 第二图案化和固化的低k材料的一部分部分地填充第一图案化和固化的低k材料内的至少一个第一互连。 导电材料填充至少一个第一互连图案和至少一个第二互连图案。 还提供了形成这种自对准互连结构的方法。

公开(公告)号：US20130009312A1

公开(公告)日：2013-01-10

申请号：US13603017

申请日：2012-09-04

申请人： Maxime Darnon ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Qinghuang Lin

发明人： Maxime Darnon ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Qinghuang Lin

IPC分类号： H01L23/485 ,  H05K1/09 ,  H05K1/02

CPC分类号： H01L23/53295 ,  H01L21/4846 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/49894 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： An interconnect structure within a microelectronic structure and a method for fabricating the interconnect structure within the microelectronic structure use a developable bottom anti-reflective coating layer and at least one imageable inter-level dielectric layer located thereupon over a substrate that includes a base dielectric layer and a first conductor layer located and formed embedded within the base dielectric layer. Incident to use of the developable bottom anti-reflective coating layer and the at least one imageable inter-level dielectric layer, an aperture, such as but not limited to a dual damascene aperture, may be formed through the at least one imageable inter-level dielectric layer and the developable anti-reflective coating layer to expose a capping layer located and formed upon the first conductor layer, absent use of a dry plasma etch method when forming the interconnect structure within the microelectronic structure.

摘要翻译： 微电子结构内的互连结构和用于在微电子结构内制造互连结构的方法使用可显影底部抗反射涂层和位于其上的至少一个可成像的层间电介质层，该基底包括基底电介质层和 第一导体层，其位于并形成为嵌入在所述基极介质层内。 使用可显影底部抗反射涂层和至少一个可成像的层间电介质层的事件可以通过至少一个可成像的层间间隔形成孔，例如但不限于双镶嵌孔， 介电层和可显影的抗反射涂层，以在位于和形成在第一导体层上时露出覆盖层，当在微电子结构内形成互连结构时，不使用干等离子体蚀刻方法。

公开(公告)号：US20130001781A1

公开(公告)日：2013-01-03

申请号：US13602126

申请日：2012-09-01

申请人： Maxime Darnon ,  Qinghuang Lin

发明人： Maxime Darnon ,  Qinghuang Lin

IPC分类号： H01L23/532 ,  H01L23/522

CPC分类号： H01L21/76804 ,  C08G77/04 ,  H01L21/02126 ,  H01L21/02318 ,  H01L21/31 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An interconnect structure is provided which includes at least one patterned and cured low-k material located directly on a surface of a substrate; and at least one least one conductively filled region embedded within an interconnect pattern located within the at least one patterned and cured low-k material, wherein the at least one conductively filled region has an inflection point at a lower region of the interconnect pattern that is in proximity to an upper surface of the substrate and the interconnect region having an upper region that has substantially straight sidewalls.

摘要翻译： 提供了一种互连结构，其包括直接位于衬底的表面上的至少一个图案化和固化的低k材料; 以及至少一个导电填充区域，其嵌入位于所述至少一个图案化和固化的低k材料内的互连图案内，其中所述至少一个导电填充区域在所述互连图案的下部区域具有拐点， 靠近衬底的上表面，并且互连区域具有具有基本上直的侧壁的上部区域。

公开(公告)号：US20120325532A1

公开(公告)日：2012-12-27

申请号：US13602496

申请日：2012-09-04

申请人： Qinghuang Lin

发明人： Qinghuang Lin

IPC分类号： H05K1/11 ,  H05K1/09 ,  H05K1/02 ,  H05K1/00

CPC分类号： H01L21/76825 ,  H01L21/0276 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76808 ,  H01L21/76826 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An interconnect structure is provided that may include at least one cured permanent patterned dielectric material located on a surface of a substrate. The at least one cured permanent patterned dielectric material is a cured product of a patterned photoresist that includes a dielectric enabling element therein. The structure further includes at least one conductively filled region embedded within the at least one cured permanent patterned dielectric material.

摘要翻译： 提供了互连结构，其可以包括位于衬底的表面上的至少一个固化的永久性图案化电介质材料。 所述至少一种固化的永久性图案化电介质材料是在其中包括电介质使能元件的图案化光致抗蚀剂的固化产物。 所述结构还包括至少一个导电填充区域，其嵌入在所述至少一个固化的永久构图电介质材料内。

公开(公告)号：US08334203B2

公开(公告)日：2012-12-18

申请号：US12814162

申请日：2010-06-11

申请人： Qinghuang Lin ,  Dirk Pfeiffer ,  Ratnam Sooriyakumaran

发明人： Qinghuang Lin ,  Dirk Pfeiffer ,  Ratnam Sooriyakumaran

IPC分类号： H01L21/4763

CPC分类号： H01L23/5329 ,  G03F7/0035 ,  G03F7/40 ,  H01L21/02123 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/743 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An interconnect structure is provided which comprises a semiconductor substrate; a patterned and cured photoresist wherein the photoresist contains a low k dielectric substitutent and contains a fortification layer on its top and sidewall surfaces forming vias or trenches; and a conductive fill material in the vias or trenches. Also provided is a method for fabricating an interconnect structure which comprises depositing a photoresist onto a semiconductor substrate, wherein the photoresist contains a low k dielectric constituent; imagewise exposing the photoresist to actinic radiation; then forming a pattern of vias or trenches in the photoresist; surface fortifying the pattern of vias or trenches proving a fortification layer on the top and sidewalls of the vias or trenches; curing the pattern of vias or trenches thereby converting the photoresist into a dielectric; and filling the vias and trenches with a conductive fill material.

摘要翻译： 提供一种互连结构，其包括半导体衬底; 图案化和固化的光致抗蚀剂，其中光致抗蚀剂含有低k电介质替代物，并且在其顶部和侧壁表面上包含形成通孔或沟槽的强化层; 以及通孔或沟槽中的导电填充材料。 还提供了一种用于制造互连结构的方法，其包括在半导体衬底上沉积光致抗蚀剂，其中光致抗蚀剂含有低k电介质成分; 将光刻胶成像曝光于光化辐射; 然后在光致抗蚀剂中形成通孔或沟槽的图案; 表面强化通孔或沟槽的图案，证明通孔或沟槽的顶部和侧壁上的强化层; 固化通孔或沟槽的图案，从而将光致抗蚀剂转化为电介质; 并用导电填充材料填充通孔和沟槽。

公开(公告)号：US08163658B2

公开(公告)日：2012-04-24

申请号：US12546235

申请日：2009-08-24

申请人： Qinghuang Lin

发明人： Qinghuang Lin

IPC分类号： H01L21/469 ,  H01L23/58

CPC分类号： H01L21/3105 ,  C08G77/04 ,  G03F7/0035 ,  G03F7/0757 ,  G03F7/091 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/0276 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/28123 ,  H01L21/31 ,  H01L21/31144 ,  H01L21/3121

摘要： A method of double patterning a semiconductor structure with a single material which after patterning becomes a permanent part of the semiconductor structure. More specifically, a method to form a patterned semiconductor structure with small features is provided which are difficult to obtain using conventional exposure lithographic processes. The method of the present invention includes the use of patternable low-k materials which after patterning remain as a low-k dielectric material within the semiconductor structure. The method is useful in forming semiconductor interconnect structures in which the patternable low-k materials after patterning and curing become a permanent element, e.g., a patterned interlayer low-k material, of the interconnect structure.

摘要翻译： 用图案化之后的单一材料对半导体结构进行双重图案化的方法成为半导体结构的永久部分。 更具体地，提供了一种形成具有小特征的图案化半导体结构的方法，其难以使用常规曝光光刻工艺获得。 本发明的方法包括使用可图案化的低k材料，其在图案化之后保持为半导体结构内的低k电介质材料。 该方法在形成半导体互连结构中是有用的，其中图案化和固化后的可图案化的低k材料成为互连结构的永久性元件，例如图案化的层间低k材料。

公开(公告)号：US20110312177A1

公开(公告)日：2011-12-22

申请号：US13219144

申请日：2011-08-26

申请人： Qinghuang Lin ,  Deborah A. Neumayer

发明人： Qinghuang Lin ,  Deborah A. Neumayer

IPC分类号： H01L21/768

CPC分类号： H01L21/76808 ,  H01L21/02118 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/0276 ,  H01L21/31 ,  H01L21/3121 ,  H01L21/3122 ,  H01L21/3148 ,  H01L21/76832 ,  H01L21/76835 ,  H01L21/76843 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate, said inorganic antireflective coating is vapor deposited and comprises atoms of M, C and H wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La; forming at least one interconnect pattern within the at least one patternable low-k material; and curing the at least one patternable low-k material. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.

摘要翻译： 本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。 具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。 一般来说，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料，所述无机抗反射涂层被气相沉积并包含M，C和H原子 其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种; 在所述至少一个可编码的低k材料内形成至少一个互连图案; 以及固化所述至少一种可图案化的低k材料。 本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。

公开(公告)号：US20110291284A1

公开(公告)日：2011-12-01

申请号：US12788912

申请日：2010-05-27

申请人： Dario L. Goldfarb ,  Ranee W. Kwong ,  Qinghuang Lin ,  Deborah A. Neumayer ,  Hosadurga Shobha

发明人： Dario L. Goldfarb ,  Ranee W. Kwong ,  Qinghuang Lin ,  Deborah A. Neumayer ,  Hosadurga Shobha

IPC分类号： H01L23/522 ,  H01L21/768

CPC分类号： H01L21/76802 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/76808 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76835 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53271 ,  H01L23/53276 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： An interconnect structure is provided that includes at least one patterned and cured photo-patternable low k material located on a surface of a patterned and cured oxygen-doped SiC antireflective coating (ARC). A conductively filled region is located within the at least one patterned and cured photo-patternable low k material and the patterned and cured oxygen-doped SiC ARC. The oxygen-doped SiC ARC, which is a thin layer (i.e., less than 400 angstroms), does not produce standing waves that may degrade the diffusion barrier and the electrically conductive feature that are embedded within the patterned and cured photo-patternable low k dielectric material and, as such, structural integrity is maintained. Furthermore, since a thin oxygen-doped SiC ARC is employed, the plasma etch process time used to open the material stack of the ARC/dielectric cap can be reduced, thus reducing potential plasma damage to the patterned and cured photo-patternable low k material. Also, the oxygen-doped SiC ARC can withstand current BEOL processing conditions.

摘要翻译： 提供了一种互连结构，其包括位于图案化和固化的氧掺杂的SiC抗反射涂层（ARC）的表面上的至少一个图案化和固化的可光图案化的低k材料。 导电填充区域位于至少一个图案化和固化的可光图案化低k材料和图案化和固化的氧掺杂SiC ARC内。 作为薄层（即，小于400埃）的氧掺杂SiC ARC不产生可能降解扩散阻挡层和嵌入图案化和固化的可光图案化低k内的导电特征的驻波 介电材料，因此，维持结构完整性。 此外，由于采用薄氧掺杂SiC ARC，因此可以减少用于打开ARC /电介质盖的材料堆叠的等离子体蚀刻工艺时间，从而减少图案化和固化的可光图案化低k材料的潜在等离子体损伤 。 此外，氧掺杂的SiC ARC可以承受当前的BEOL加工条件。

公开(公告)号：US20100314768A1

公开(公告)日：2010-12-16

申请号：US12483588

申请日：2009-06-12

申请人： Maxime Darnon ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Qinghuang Lin

发明人： Maxime Darnon ,  Jeffrey P. Gambino ,  Elbert E. Huang ,  Qinghuang Lin

IPC分类号： H01L23/535 ,  H01L21/768

CPC分类号： H01L23/53295 ,  H01L21/4846 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76849 ,  H01L23/49894 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/00

摘要： An interconnect structure within a microelectronic structure and a method for fabricating the interconnect structure within the microelectronic structure use a developable bottom anti-reflective coating layer and at least one imageable inter-level dielectric layer located thereupon over a substrate that includes a base dielectric layer and a first conductor layer located and formed embedded within the base dielectric layer. Incident to use of the developable bottom anti-reflective coating layer and the at least one imageable inter-level dielectric layer, an aperture, such as but not limited to a dual damascene aperture, may be formed through the at least one imageable inter-level dielectric layer and the developable anti-reflective coating layer to expose a capping layer located and formed upon the first conductor layer, absent use of a dry plasma etch method when forming the interconnect structure within the microelectronic structure.

摘要翻译： 微电子结构内的互连结构和用于在微电子结构内制造互连结构的方法使用可显影底部抗反射涂层和位于其上的至少一个可成像的层间电介质层，该基底包括基底电介质层和 第一导体层，其位于并形成为嵌入在所述基极介质层内。 使用可显影底部抗反射涂层和至少一个可成像的层间电介质层的事件可以通过至少一个可成像的层间间隔形成孔，例如但不限于双镶嵌孔， 介电层和可显影的抗反射涂层，以在位于和形成在第一导体层上时露出覆盖层，当在微电子结构内形成互连结构时，不使用干等离子体蚀刻方法。