摘要:
Methods of selectively forming metal silicides on a memory device are provided. The methods can include forming a mask layer over the memory device; forming a patterned resist over the mask layer; removing upper portions of the patterned resist; forming a patterned mask layer by removing portions of the mask layer that are not covered by the patterned resist; and forming metal silicides on the memory device by a chemical reaction of a metal layer formed on the memory device with portions of the memory device that are not covered by the patterned mask layer. By preventing silicidation of underlying silicon containing layers/components of the memory device that are covered by the patterned mask layer, the methods can selectively form the metal silicides on the desired portions of the memory device.
摘要:
A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal film is deposited over the charge trapping layer to form a thick film on top of the core source/drain region and a pinch off and a void or a narrow channel at the top of the STI trench. An etch is performed on the non-conformal film to open pinch-off or widen the narrow channel in the non-conformal. The trapping layer is then completely or partially etched between the core cells. The non-conformal film is removed. And a top oxide is formed. The top oxide converts the remaining trap layer to oxide if the trapping layer is partially etched and thus isolate the trap layer.
摘要:
A method and system for providing a contact hole between structures for a semiconductor device is disclosed. The method and system comprises etching a resist material on the semiconductor device to expose a surface of the structures; providing an implant to the surface of the structures; and removing the resist material from a gap between the structures. The method and system includes annealing the semiconductor device to cause the implant to adhere to the treated surface; and providing dielectric material within the gap. Finally, the method and system includes etching the contact hole in the gap between the structures. The contact hole can then be etched without damaging the structures. Accordingly, by providing an implant treated surface and then providing an anneal process the implant is bonded to the appropriate portion of the semiconductor structure. Due to the etch difference between the implant treated device and the non-treated surface, it is possible to etch down to the bottom of the semiconductor device without damaging the gate. Since the surface around the gate structure is treated, the etch stop layer etch at a much slower rate. Therefore, there is a much larger process margin for misalignment allowance and the contact size can be larger because the dielectric material and the surface treatment protects the gate area.
摘要:
A method of forming a contact in a flash memory device utilizes a local interconnect process technique. The local interconnect process technique allows the contact to butt against or overlap a stacked gate associated with the memory cell. The contact can include tungsten. The stacked gate is covered by a barrier layer which also covers the insulative spacers.
摘要:
A method of forming a contact in a flash memory device utilizes a local interconnect process technique. The local interconnect process technique allows the contact to butt against or overlap a stacked gate associated with the memory cell. The contact can include tungsten. The stacked gate is covered by a barrier layer which also covers the insulative spacers.
摘要:
Systems and methodologies are disclosed for increasing the number of memory cells associated with a lithographic feature. The systems comprise memory elements that are formed on the sidewalls of the lithographic feature by employing various depositing and etching processes. The side wall memory cells can have a bit line of the wafer as the first electrode and operate with a second formed electrode to activate a portion of an organic matter that is formed there between.
摘要:
A process for fabricating a memory cell in a two-bit EEPROM device including forming an ONO layer overlying a semiconductor substrate, depositing a hard mask overlying the ONO layer, and patterning the hard mask. The hard mask is made from tungsten, titanium, or titanium nitride. The process further includes doping the semiconductor substrate with boron causing p-type regions to form in the semiconductor substrate, and doping the semiconductor substrate with n-type dopants, such as arsenic, causing n-type regions to form in the semiconductor substrate. The exposed ONO layer is then etched to expose part of the semiconductor substrate, and a bit-line oxide region is formed overlying the semiconductor substrate. The hard mask is then stripped, preferably using an H2O2 solution.
摘要翻译:一种用于在二位EEPROM器件中制造存储单元的方法,包括形成覆盖在半导体衬底上的ONO层,沉积覆盖在ONO层上的硬掩模,以及对该硬掩模进行构图。 硬掩模由钨,钛或氮化钛制成。 该工艺还包括用硼掺杂导致在半导体衬底中形成p型区域的半导体衬底,并且用诸如砷的n型掺杂剂掺杂半导体衬底,从而在半导体衬底中形成n型区域。 然后对暴露的ONO层进行蚀刻以暴露半导体衬底的一部分,并且在半导体衬底上形成位线氧化物区域。 然后将硬掩模剥离,优选使用H 2 O 2溶液。
摘要:
An improved transmission system for a document feeder, in which a constant one-way-rotating gear train is mounted in an output zone so as to cause a transmission shaft in the output zone to rotate in one direction only to send out a sheet of document no matter the driving gear rotates clockwise or counter-clockwise; therefore, as soon as a first sheet of document moves out of the scanning line without moving out of the output zone, the driving gear will change its rotation clockwise so as to have a next sheet of document fed into the scanning zone; therefore, the feeding distance between two sheets of document will be reduced, and consequently the whole feeding time for a document will be reduced, too.
摘要:
An embodiment of the present invention is directed to a memory cell. The memory cell includes a stack formed over a substrate. The stack includes a gate oxide layer and an overlying polycrystalline silicon layer. The stack further includes first and second undercut regions formed under the polycrystalline silicon layer and adjacent to the gate oxide layer. The memory cell further includes a first charge storage element formed in the first undercut region and a second charge storage element formed in the second undercut region.
摘要:
A method of making organic memory cells made of two electrodes with a controllably conductive media between the two electrodes is disclosed. The controllably conductive media contains an organic semiconductor layer that contains a photosensitive compound. The organic semiconductor layer is formed into memory cells using patterning techniques.